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<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
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<div class="title">MMDC: Multi Mode DDR Controller Driver</div>  </div>
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<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<p>The MCUXpresso SDK provides a peripheral driver for the Multi Mode DDR Controller block of MCUXpresso SDK devices.</p>
<p>The MMDC is configurable high performance and optimized DDR controller that support LPDDR2 x16 memory type. The MMDC driver provide function API to config the MMDC core and PHY register.</p>
<h1><a class="anchor" id="MMDCTpyUC"></a>
Typical use case</h1>
<p>This example shows how to use the MMDC driver to initialize the external 16 bit DDR device. Initialize the MMDC controller and run the initialization sequence. The external DDR device is initialized and the DDR read and write is available.</p>
<p>Initialize the LPDDR2 Controller and external device. </p>
<div class="fragment"><div class="line"><a class="code" href="group__mmdc.html#structmmdc__device__timing__t">mmdc_device_timing_t</a> timing = </div>
<div class="line">{</div>
<div class="line">    .<a class="code" href="group__mmdc.html#ad574ea09c5d52a5bc9aba3717c23ba11">tCKE_Clocks</a> = 3U,</div>
<div class="line">    .tCKSRE_Clocks = 2U,</div>
<div class="line">    .tCKSRX_Clocks = 2U,</div>
<div class="line">    .tRFC_Clocks = 40U,</div>
<div class="line">    .tXSR_Clocks = 43U,</div>
<div class="line">    .tXP_Clocks = 3U,</div>
<div class="line">    .tFAW_Clocks = 16U,</div>
<div class="line">    .tCL_Clocks = 3U,</div>
<div class="line">    .tMRD_Clocks = 3U, </div>
<div class="line">    .tRAS_Clocks = 13U,</div>
<div class="line">    .tWR_Clocks = 5U,</div>
<div class="line">    .tRTP_Clocks = 3U,</div>
<div class="line">    .tWTR_Clocks = 4U,</div>
<div class="line">    .tRRD_Clocks = 4U,</div>
<div class="line">    .ralat_Clocks = 5U,</div>
<div class="line">    .walat_Clocks = 0U,</div>
<div class="line">    .tRC_Clocks = 19U,</div>
<div class="line">    .tRCD_Clocks = 6U,</div>
<div class="line">    .tRP_Clocks = 6U,</div>
<div class="line">    .tRPA_Clocks = 7U,</div>
<div class="line">    .tCWL_Clocks = 1U,</div>
<div class="line">    .tRSTtoCKE_Clocks = 14U,</div>
<div class="line">    .tXPR_Clocks = 159U,</div>
<div class="line">    .tRTWSAME_Clocks = 2U,</div>
<div class="line">    .tWTRDIFF_Clocks = 3U,</div>
<div class="line">    .tWTWDIFF_Clocks = 3U,</div>
<div class="line">    .tRTWDIFF_Clocks = 2U,</div>
<div class="line">    .tRTRDIFF_Clocks = 2U,</div>
<div class="line">    .tDAI_Clocks = 3001U,    </div>
<div class="line">};</div>
<div class="line"></div>
<div class="line"><a class="code" href="group__mmdc.html#structmmdc__fine__tuning__config__t">mmdc_fine_tuning_config_t</a> tuning = </div>
<div class="line">{</div>
<div class="line">    .<a class="code" href="group__mmdc.html#a09da98b7d6707e0d6b2f3bc8b8f33ef6">caDelay</a> = 0x47U,</div>
<div class="line">    .rDQOffset0 = 0x33333333U,</div>
<div class="line">    .rDQOffset1 = 0x33333333U,</div>
<div class="line">    .wDQOffset0 = 0xf3333333U,</div>
<div class="line">    .wDQOffset1 = 0xf3333333U,</div>
<div class="line">    .rDQDuty0 =  <a class="code" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152">kMMDC_DutyHighPercent50</a>,</div>
<div class="line">    .rDQDuty1 =  <a class="code" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152">kMMDC_DutyHighPercent50</a>,</div>
<div class="line">    .ddrCKDutyCtl0 = <a class="code" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152">kMMDC_DutyHighPercent50</a>,</div>
<div class="line">    .ddrCKDutyCtl1 = <a class="code" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152">kMMDC_DutyHighPercent50</a>,</div>
<div class="line">    .wDQDuty0 =  <a class="code" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152">kMMDC_DutyHighPercent50</a>,</div>
<div class="line">    .wDQDuty1 =  <a class="code" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152">kMMDC_DutyHighPercent50</a>,    </div>
<div class="line">};</div>
<div class="line"></div>
<div class="line"><a class="code" href="group__mmdc.html#structmmdc__zq__config__t">mmdc_zq_config_t</a> zqCal = </div>
<div class="line">{</div>
<div class="line">    .<a class="code" href="group__mmdc.html#a318492ee5cf973302895fa53ca77821b">mode</a> = <a class="code" href="group__mmdc.html#ggad35261414c9c921bc08b8ffcddf817ffa1c5c3eea04f4c3d43d9491f83a6a70e3">kMMDC_ZQCaltoIODeviceLongShort</a>,</div>
<div class="line">    .earlyCompTimer = 21U,</div>
<div class="line">    .hwZQFreq = <a class="code" href="group__mmdc.html#gga468f46beeb78ef3cf23b392243a3cbeaaad9dce3c6126cb10cd753958dcba79b3">kMMDC_ZQCalFreq1ms</a>,</div>
<div class="line">    .cmpOutSample = 15U,</div>
<div class="line">    .tZQCl_Clocks = 144U,</div>
<div class="line">    .tZQCs_Clocks = 112U,</div>
<div class="line">    .tZQInit_Clocks = 400U,</div>
<div class="line">    .cmpOutSample = 7,</div>
<div class="line">    .hwPullDownOffset = 0U,</div>
<div class="line">    .hwPullUpOffset = 0U,    </div>
<div class="line">};</div>
<div class="line"></div>
<div class="line">    <a class="code" href="group__mmdc.html#structmmdc__config__t">mmdc_config_t</a> userConfig;</div>
<div class="line">    <a class="code" href="group__mmdc.html#structmmdc__zq__config__t">mmdc_zq_config_t</a> zqCal;</div>
<div class="line">    <a class="code" href="group__mmdc.html#structmmdc__read__calibration__config__t">mmdc_read_calibration_config_t</a> readCal;</div>
<div class="line">    mmdc_write_calibration_config_t writeCal;</div>
<div class="line">    <a class="code" href="group__mmdc.html#structmmdc__device__config__t">mmdc_device_config_t</a> config;</div>
<div class="line">    <a class="code" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a> autoRefresh;</div>
<div class="line"></div>
<div class="line">    readCal.<a class="code" href="group__mmdc.html#a16a101ea88a067d05b51e350a6f09160">mode</a> = <a class="code" href="group__mmdc.html#gga947cb9e89a390cfc0fcce314f8dafddeaf94f50c9c2c1f910ecad5ee3c1cb19b9">kMMDC_CalWithMPR</a>;</div>
<div class="line">    readCal.<a class="code" href="group__mmdc.html#ad91f9834674cab234176e700bf02e3a6">readDelay0</a> = 0x40U;</div>
<div class="line">    readCal.<a class="code" href="group__mmdc.html#afe9174e6c85975ea8187ba1707064352">readDelay1</a> = 0x40U;</div>
<div class="line"></div>
<div class="line">    writeCal.mode = <a class="code" href="group__mmdc.html#gga947cb9e89a390cfc0fcce314f8dafddeadf2096187abe015c1814e6aab917e73e">kMMDC_CalWithPreDefine</a>;</div>
<div class="line">    writeCal.writeDelay0 = 0x40U;</div>
<div class="line">    writeCal.writeDelay1 = 0x40U;</div>
<div class="line"></div>
<div class="line">    config.MR1 = 0x82U;</div>
<div class="line">    config.MR2 = 0x01U;</div>
<div class="line">    config.MR3 = 0x01U;</div>
<div class="line"></div>
<div class="line">    autoRefresh.<a class="code" href="group__mmdc.html#ab9ea22f65b6a9da9f14f357b9b1bf154">refreshCnt</a> = 0;</div>
<div class="line">    autoRefresh.<a class="code" href="group__mmdc.html#a6db1e8b45e54611713c6b12fc4c34a8d">refreshRate</a> = 4;</div>
<div class="line">    autoRefresh.<a class="code" href="group__mmdc.html#a46a531b5ddd549d77cd19528d9e9ba01">refreshTrigSrc</a> = <a class="code" href="group__mmdc.html#gga6083c5da4c6bd0ad9ec1592bf02e4183a6d138a71319d150d8eb2f2d2a589b5cc">kMMDC_RefreshTrigBy64K</a>;</div>
<div class="line"></div>
<div class="line">    <span class="comment">/* </span></div>
<div class="line"><span class="comment">    *  config-&gt;bankInterleave = true;</span></div>
<div class="line"><span class="comment">    *  config-&gt;secondDDRClock = true;</span></div>
<div class="line"><span class="comment">    *  config-&gt;enableOnlyCS0 = true;</span></div>
<div class="line"><span class="comment">    *  config-&gt;devType = kMMDC_DDR3;</span></div>
<div class="line"><span class="comment">    *  config-&gt;devSize = 0x40000000U;</span></div>
<div class="line"><span class="comment">    *  config-&gt;devBank = kMMDC_Bank8;</span></div>
<div class="line"><span class="comment">    *  config-&gt;rowWidth = kMMDC_Row16Bits;</span></div>
<div class="line"><span class="comment">    *  config-&gt;colWidth = kMMDC_Col10Bits;</span></div>
<div class="line"><span class="comment">    *  config-&gt;burstLen = kMMDC_BurstLen8;</span></div>
<div class="line"><span class="comment">    *  config-&gt;odtByte1Config = kMMDC_RttNom60ohm;</span></div>
<div class="line"><span class="comment">    *  config-&gt;odtByte0Config = kMMDC_RttNom60ohm;    </span></div>
<div class="line"><span class="comment">    *  config-&gt;enableActiveReadOdt = false;</span></div>
<div class="line"><span class="comment">    *  config-&gt;enableInactiveReadOdt = true;</span></div>
<div class="line"><span class="comment">    *  config-&gt;enableActiveWriteOdt = true;</span></div>
<div class="line"><span class="comment">    *  config-&gt;enableInactiveWriteOdt = true;</span></div>
<div class="line"><span class="comment">    */</span></div>
<div class="line">    <a class="code" href="group__mmdc.html#ga0d157d874e73e4272da53690d85a9994">MMDC_GetDefaultConfig</a>(&amp;userConfig);</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a4d2187c8778217b166172de6fcfd694d">devType</a> = <a class="code" href="group__mmdc.html#ggab210b492af2dae23c0dc82f9b7ad3339adaef93147ac1e04b29c516efc96b1d05">kMMDC_LPDDR2_S4</a>;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a3fe52d1acde7f9922b601987be5c0f5f">devSize</a> = EXAMPLE_DDR_SIZE;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a9e00c5e66573c119a1b8880ffb0d0b88">rowWidth</a> = EXAMPLE_DDR_ROW_WIDTH;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a8762ae8f7686008cb55fc36fbfb17999">colWidth</a> = EXAMPLE_DDR_COL_WIDTH;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#ae6bd45e48393a3eeaef64303b2bc47d3">burstLen</a> = EXAMPLE_DDR_BURST_LEN;</div>
<div class="line">    userConfig.timing = &amp;timing;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a0dd68afeaa0cea68e7d61e9840acf7ac">deviceConfig</a>[0] = &amp;config;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#ad2257eb5949abf63409d6d7533d7b214">readCalibration</a>[0] = &amp;readCal;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a4e17185f34191766243648dcc3df35fa">writeCalibration</a>[0] = &amp;writeCal;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a5a330d64c3a2472a21667e66db81b13c">tuning</a> = &amp;tuning;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a3b21f67e890e96d7aa988ebd075be7ec">autoRefresh</a> = &amp;autoRefresh;</div>
<div class="line">    userConfig.<a class="code" href="group__mmdc.html#a778db8320ef2c06580b3a4c8b9fcec12">zqCalibration</a> = &amp;zqCal;</div>
<div class="line"></div>
<div class="line">    <span class="comment">/* MMDC Initialization. */</span></div>
<div class="line">    <span class="keywordflow">if</span> (<a class="code" href="group__mmdc.html#gaecda15e9ebcdb3bf10bc32d2ae5aaa57">MMDC_Init</a>(EXAMPLE_MMDC, &amp;userConfig) != kStatus_Success)</div>
<div class="line">    {</div>
<div class="line">        PRINTF(<span class="stringliteral">&quot;\r\n MMDC Init Failed. \r\n&quot;</span>);</div>
<div class="line">    }</div>
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<tr class="memitem:structmmdc__zq__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__zq__config__t">mmdc_zq_config_t</a></td></tr>
<tr class="memdesc:structmmdc__zq__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC ZQ configuration collection.  <a href="group__mmdc.html#structmmdc__zq__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__cmd__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__cmd__config__t">mmdc_cmd_config_t</a></td></tr>
<tr class="memdesc:structmmdc__cmd__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC cmd configuration collection.  <a href="group__mmdc.html#structmmdc__cmd__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__device__timing__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__device__timing__t">mmdc_device_timing_t</a></td></tr>
<tr class="memdesc:structmmdc__device__timing__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC device device timing configuration collection.  <a href="group__mmdc.html#structmmdc__device__timing__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__auto__refresh__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a></td></tr>
<tr class="memdesc:structmmdc__auto__refresh__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC auto refresh configuration collection.  <a href="group__mmdc.html#structmmdc__auto__refresh__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__exaccess__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__exaccess__config__t">mmdc_exaccess_config_t</a></td></tr>
<tr class="memdesc:structmmdc__exaccess__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC exclusive access configuration collection.  <a href="group__mmdc.html#structmmdc__exaccess__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__profiling__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__profiling__config__t">mmdc_profiling_config_t</a></td></tr>
<tr class="memdesc:structmmdc__profiling__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module profiling configuration collection.  <a href="group__mmdc.html#structmmdc__profiling__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__performance__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__performance__config__t">mmdc_performance_config_t</a></td></tr>
<tr class="memdesc:structmmdc__performance__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC performance configuration collection.  <a href="group__mmdc.html#structmmdc__performance__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__device__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__device__config__t">mmdc_device_config_t</a></td></tr>
<tr class="memdesc:structmmdc__device__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module relate configuration collection.  <a href="group__mmdc.html#structmmdc__device__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structmmdc__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#structmmdc__config__t">mmdc_config_t</a></td></tr>
<tr class="memdesc:structmmdc__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module relate configuration collection.  <a href="group__mmdc.html#structmmdc__config__t">More...</a><br/></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:gadd71829f22e107f477485d9cff5d6939"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gadd71829f22e107f477485d9cff5d6939">MMDC_SwitchFrequency</a> )(MMDC_Type *, void *, void *, uint32_t)</td></tr>
<tr class="memdesc:gadd71829f22e107f477485d9cff5d6939"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC switch frequency api prototype.  <a href="#gadd71829f22e107f477485d9cff5d6939">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga0f1ea8b47734a51a44c97157f3fe80cb"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga0f1ea8b47734a51a44c97157f3fe80cb">_mmdc_status</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga0f1ea8b47734a51a44c97157f3fe80cba77d5457552dd53f0b98349dfc0527cef">kStatus_MMDC_ErrorDGCalibration</a> = MAKE_STATUS(kStatusGroup_MMDC, 1), 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga0f1ea8b47734a51a44c97157f3fe80cba27aa6b41e2ca49fb84a279cb8c75d180">kStatus_MMDC_ErrorReadCalibration</a> = MAKE_STATUS(kStatusGroup_MMDC, 2), 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga0f1ea8b47734a51a44c97157f3fe80cba6260860c647d047bbdfdc93b854450fb">kStatus_MMDC_ErrorWriteCalibration</a> = MAKE_STATUS(kStatusGroup_MMDC, 3), 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga0f1ea8b47734a51a44c97157f3fe80cba633dc728d88021c2ec74a882c3926e52">kStatus_MMDC_ErrorWriteLevelingCalibration</a> = MAKE_STATUS(kStatusGroup_MMDC, 4), 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga0f1ea8b47734a51a44c97157f3fe80cbae696011188cbfdfceff1a64f4b4c3522">kStatus_MMDC_WaitFlagTimeout</a> = MAKE_STATUS(kStatusGroup_MMDC, 5)
<br/>
 }</td></tr>
<tr class="memdesc:ga0f1ea8b47734a51a44c97157f3fe80cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC status return codes.  <a href="group__mmdc.html#ga0f1ea8b47734a51a44c97157f3fe80cb">More...</a><br/></td></tr>
<tr class="separator:ga0f1ea8b47734a51a44c97157f3fe80cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab210b492af2dae23c0dc82f9b7ad3339"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab210b492af2dae23c0dc82f9b7ad3339adaef93147ac1e04b29c516efc96b1d05">kMMDC_LPDDR2_S4</a> = 0x0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab210b492af2dae23c0dc82f9b7ad3339ad2007a5624e14ba574a891051b2069c2">kMMDC_LPDDR2_S2</a> = 0x1U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab210b492af2dae23c0dc82f9b7ad3339a8d12adce93de01e486586a7b66e952c8">kMMDC_DDR3</a> = 0x2U
<br/>
 }</td></tr>
<tr class="memdesc:gab210b492af2dae23c0dc82f9b7ad3339"><td class="mdescLeft">&#160;</td><td class="mdescRight">LPDDR2 device list.  <a href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">More...</a><br/></td></tr>
<tr class="separator:gab210b492af2dae23c0dc82f9b7ad3339"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8cfdf8e7aa5a153cfc8c36f5f801a803"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga8cfdf8e7aa5a153cfc8c36f5f801a803">mmdc_device_bank_num_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga8cfdf8e7aa5a153cfc8c36f5f801a803ae47ae788ad0f91239a10f4a1479648ea">kMMDC_Bank8</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga8cfdf8e7aa5a153cfc8c36f5f801a803a9640310be9c5977c6800d045e1862f84">kMMDC_Bank4</a> = 1U
<br/>
 }</td></tr>
<tr class="memdesc:ga8cfdf8e7aa5a153cfc8c36f5f801a803"><td class="mdescLeft">&#160;</td><td class="mdescRight">LPDDR2 device bank number.  <a href="group__mmdc.html#ga8cfdf8e7aa5a153cfc8c36f5f801a803">More...</a><br/></td></tr>
<tr class="separator:ga8cfdf8e7aa5a153cfc8c36f5f801a803"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaee6009cc074c85e545787c20e694b340"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gaee6009cc074c85e545787c20e694b340">mmdc_row_addr_width_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaee6009cc074c85e545787c20e694b340a5462768c0e58133b6b87e39e80422473">kMMDC_Row11Bits</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaee6009cc074c85e545787c20e694b340ad6fb8eae91e6daf828a642274b02fea7">kMMDC_Row12Bits</a> = 1U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaee6009cc074c85e545787c20e694b340a9ff76ef8b787391ec87540b7b9fbc88d">kMMDC_Row13Bits</a> = 2U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaee6009cc074c85e545787c20e694b340ad431af5709cb227e0376fe3e32f76643">kMMDC_Row14Bits</a> = 3U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaee6009cc074c85e545787c20e694b340aba1e19d09fba051ecba6db3c0ff91e80">kMMDC_Row15Bits</a> = 4U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaee6009cc074c85e545787c20e694b340aef9c1a4da07175f5529972e84dfa43f6">kMMDC_Row16Bits</a> = 5U
<br/>
 }</td></tr>
<tr class="memdesc:gaee6009cc074c85e545787c20e694b340"><td class="mdescLeft">&#160;</td><td class="mdescRight">define for row addr width  <a href="group__mmdc.html#gaee6009cc074c85e545787c20e694b340">More...</a><br/></td></tr>
<tr class="separator:gaee6009cc074c85e545787c20e694b340"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaddc758eb4bd3d4a9394a4caad314670a"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gaddc758eb4bd3d4a9394a4caad314670a">mmdc_col_addr_width_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddc758eb4bd3d4a9394a4caad314670aa6229d81c9914f4729cf1caa597c3c193">kMMDC_Col9Bits</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddc758eb4bd3d4a9394a4caad314670aa32151b1933c5c94ebd130ff5260693b8">kMMDC_Col10Bits</a> = 1U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddc758eb4bd3d4a9394a4caad314670aace7c35d8dbcfb308f740b71167c28aaa">kMMDC_Col11Bits</a> = 2U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddc758eb4bd3d4a9394a4caad314670aa19a8a79fd6b1e62601effb7dec217b4d">kMMDC_Col8Bits</a> = 3U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddc758eb4bd3d4a9394a4caad314670aaebc275a52be7f232e2496c4324848622">kMMDC_Col12Bits</a> = 4U
<br/>
 }</td></tr>
<tr class="memdesc:gaddc758eb4bd3d4a9394a4caad314670a"><td class="mdescLeft">&#160;</td><td class="mdescRight">define for col addr width  <a href="group__mmdc.html#gaddc758eb4bd3d4a9394a4caad314670a">More...</a><br/></td></tr>
<tr class="separator:gaddc758eb4bd3d4a9394a4caad314670a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga299ae477876b1965ed54c4f3d8617b8d"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga299ae477876b1965ed54c4f3d8617b8d">mmdc_burst_len_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga299ae477876b1965ed54c4f3d8617b8da201bef8a155157694810dab596e9f0f1">kMMDC_BurstLen4</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga299ae477876b1965ed54c4f3d8617b8daa5f4d6e1e9f2cc91498115b52c53494d">kMMDC_BurstLen8</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga299ae477876b1965ed54c4f3d8617b8dafa709873e51e85c04c77ea163b7a5d25">kMMDC_BurstLen16</a>
<br/>
 }</td></tr>
<tr class="memdesc:ga299ae477876b1965ed54c4f3d8617b8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">define for burst length  <a href="group__mmdc.html#ga299ae477876b1965ed54c4f3d8617b8d">More...</a><br/></td></tr>
<tr class="separator:ga299ae477876b1965ed54c4f3d8617b8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaddb10c3c6cddcf3cb846cdc171fc127e"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gaddb10c3c6cddcf3cb846cdc171fc127e">mmdc_cmd_type_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddb10c3c6cddcf3cb846cdc171fc127ea39a5da0c04e765dc95497bbe4ccd618f">kMMDC_NormalOperation</a> = 0x0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddb10c3c6cddcf3cb846cdc171fc127ea5d6c2c0d1f5486e3e2d0e8f852735290">kMMDC_AutoRefresh</a> = 0x2U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddb10c3c6cddcf3cb846cdc171fc127ea8bba4acac2caf2f6d10e475145cf25c3">kMMDC_WriteModeRegister</a> = 0x3U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddb10c3c6cddcf3cb846cdc171fc127ea613fac9dc69b5e209be3cab9bf3acc00">kMMDC_ZQCalibration</a> = 0x04U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddb10c3c6cddcf3cb846cdc171fc127ea86ed07e7879e14674ad589bc29f5b444">kMMDC_PreChargeAll</a> = 0x05U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaddb10c3c6cddcf3cb846cdc171fc127eaa39205d913f899b6fef8b6834a41d82a">kMMDC_ReadModeRegister</a> = 0x6U
<br/>
 }</td></tr>
<tr class="memdesc:gaddb10c3c6cddcf3cb846cdc171fc127e"><td class="mdescLeft">&#160;</td><td class="mdescRight">define for command type auto refresh cmd: select correct CMD_CS before issue this cmd write mode register cmd: DDR2/DDR3: CMD_CS,CMD_BA,CMD_ADDR_LSB,CMD_ADDR_MSB LPDDR2: CMD_CS,MR_OP,MR_ADDR ZQ calibration cmd: DDR2/DDR3: CMD_CS,{CMD_ADDR_MSB,CMD_ADDR_LSB}=0x400,or 0x0 LPDDR2: through MRW cmd PreChargeAll cmd: selecet correct CMD_CS MRR cmd: only for LPDDR2/LPDDR3 device,must set correct CMD_CS,MR_ADDR  <a href="group__mmdc.html#gaddb10c3c6cddcf3cb846cdc171fc127e">More...</a><br/></td></tr>
<tr class="separator:gaddb10c3c6cddcf3cb846cdc171fc127e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad35261414c9c921bc08b8ffcddf817ff"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gad35261414c9c921bc08b8ffcddf817ff">mmdc_zq_calmode_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggad35261414c9c921bc08b8ffcddf817ffa85128306e31eec13f8a72ffba33f46fc">kMMDC_ZQCaltoIOHW</a> = 0x4U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggad35261414c9c921bc08b8ffcddf817ffaf64229de230434590619fd189a18c985">kMMDC_ZQCaltoIODeviceLong</a> = 0x01U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggad35261414c9c921bc08b8ffcddf817ffaf46199e708dbff37b3f1cb0c6577cd72">kMMDC_ZQCaltoDeviceOnly</a> = 0x02U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggad35261414c9c921bc08b8ffcddf817ffa1c5c3eea04f4c3d43d9491f83a6a70e3">kMMDC_ZQCaltoIODeviceLongShort</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggad35261414c9c921bc08b8ffcddf817ffa31cad4951d9e99c6643aaef52fc9b1d1">kMMDC_ZQFinetuning</a> = 0x0AU, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggad35261414c9c921bc08b8ffcddf817ffac8bc273fb7776aefd818eb60c13e99d8">kMMDC_DisZQFinetuning</a> = 0x0BU
<br/>
 }</td></tr>
<tr class="memdesc:gad35261414c9c921bc08b8ffcddf817ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC ZQ calibration type.  <a href="group__mmdc.html#gad35261414c9c921bc08b8ffcddf817ff">More...</a><br/></td></tr>
<tr class="separator:gad35261414c9c921bc08b8ffcddf817ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga468f46beeb78ef3cf23b392243a3cbea"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga468f46beeb78ef3cf23b392243a3cbea">mmdc_zq_calfreq_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga468f46beeb78ef3cf23b392243a3cbeaaad9dce3c6126cb10cd753958dcba79b3">kMMDC_ZQCalFreq1ms</a> = 0x0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga468f46beeb78ef3cf23b392243a3cbeaa97f099bf0ca8c3d8e3ce9340835aa3de">kMMDC_ZQCalFreq2ms</a> = 0x1U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga468f46beeb78ef3cf23b392243a3cbeaaff52b67a7f674eae561eb196f5280064">kMMDC_ZQCalFreq4ms</a> = 0x2U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga468f46beeb78ef3cf23b392243a3cbeaa7dfaf191c5c4d57b5edd5f245e6dc77a">kMMDC_ZQCalFreq1s</a> = 0x6U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga468f46beeb78ef3cf23b392243a3cbeaa5719b0a3394a8e9f4c445849226d670d">kMMDC_ZQCalFreq16s</a> = 0xEU, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga468f46beeb78ef3cf23b392243a3cbeaa99ed509d6b7bb48b4a15260ec85acaee">kMMDC_ZQCalFreq32s</a> = 0xFU
<br/>
 }</td></tr>
<tr class="memdesc:ga468f46beeb78ef3cf23b392243a3cbea"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC ZQ calibration frequency.  <a href="group__mmdc.html#ga468f46beeb78ef3cf23b392243a3cbea">More...</a><br/></td></tr>
<tr class="separator:ga468f46beeb78ef3cf23b392243a3cbea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6083c5da4c6bd0ad9ec1592bf02e4183"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga6083c5da4c6bd0ad9ec1592bf02e4183">mmdc_refresh_sel_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga6083c5da4c6bd0ad9ec1592bf02e4183a6d138a71319d150d8eb2f2d2a589b5cc">kMMDC_RefreshTrigBy64K</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga6083c5da4c6bd0ad9ec1592bf02e4183a9b4943b6364459ef3b428ab597cf87c7">kMMDC_RefreshTrigBy32K</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga6083c5da4c6bd0ad9ec1592bf02e4183acce14eb57b6f7b26d58a0752dc8bbc31">kMMDC_RefreshTrigDDRCycles</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga6083c5da4c6bd0ad9ec1592bf02e4183a8fa4645c19bb08dbd79b0236395af5f8">kMMDC_RefreshTrigNone</a>
<br/>
 }</td></tr>
<tr class="memdesc:ga6083c5da4c6bd0ad9ec1592bf02e4183"><td class="mdescLeft">&#160;</td><td class="mdescRight">define MMDC refresh selector-select source of the clock that will trigger each refresh cycle.  <a href="group__mmdc.html#ga6083c5da4c6bd0ad9ec1592bf02e4183">More...</a><br/></td></tr>
<tr class="separator:ga6083c5da4c6bd0ad9ec1592bf02e4183"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4fa123a8c90bdb4f7c98cb190344fc56"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga4fa123a8c90bdb4f7c98cb190344fc56">mmdc_profiling_action_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga4fa123a8c90bdb4f7c98cb190344fc56a123acc17a03be52c0f35ad792c28a07a">kMMDC_EnProfilingWithID</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga4fa123a8c90bdb4f7c98cb190344fc56ae7dfe55d812cd51a62b40bd2b3315c72">kMMDC_FreezeProfiling</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga4fa123a8c90bdb4f7c98cb190344fc56adbcab923f0539ad0bb23cf15248e87c6">kMMDC_CheckOverFlow</a>
<br/>
 }</td></tr>
<tr class="memdesc:ga4fa123a8c90bdb4f7c98cb190344fc56"><td class="mdescLeft">&#160;</td><td class="mdescRight">define MMDC profiling action define .  <a href="group__mmdc.html#ga4fa123a8c90bdb4f7c98cb190344fc56">More...</a><br/></td></tr>
<tr class="separator:ga4fa123a8c90bdb4f7c98cb190344fc56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga947cb9e89a390cfc0fcce314f8dafdde"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga947cb9e89a390cfc0fcce314f8dafdde">mmdc_calibration_type_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga947cb9e89a390cfc0fcce314f8dafddea90dacb54a2d7a72e3ac75297d076ea35">kMMDC_CalWithPreSetValue</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga947cb9e89a390cfc0fcce314f8dafddeaf94f50c9c2c1f910ecad5ee3c1cb19b9">kMMDC_CalWithMPR</a>, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga947cb9e89a390cfc0fcce314f8dafddeadf2096187abe015c1814e6aab917e73e">kMMDC_CalWithPreDefine</a>
<br/>
 }</td></tr>
<tr class="memdesc:ga947cb9e89a390cfc0fcce314f8dafdde"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC calibration type define .  <a href="group__mmdc.html#ga947cb9e89a390cfc0fcce314f8dafdde">More...</a><br/></td></tr>
<tr class="separator:ga947cb9e89a390cfc0fcce314f8dafdde"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5c17a9bcd8ce97a1fcc27c61d672266"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gaa5c17a9bcd8ce97a1fcc27c61d672266">mmdc_calibaration_waitcycles_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaa5c17a9bcd8ce97a1fcc27c61d672266af36b9db11d7ca4fccb8c85f51e13f7cc">kMMDC_Wait16DDRCycles</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggaa5c17a9bcd8ce97a1fcc27c61d672266ab5235b46ac30fbbef5aa1629bffced79">kMMDC_Wait32DDRCycles</a> = 0x01U
<br/>
 }</td></tr>
<tr class="memdesc:gaa5c17a9bcd8ce97a1fcc27c61d672266"><td class="mdescLeft">&#160;</td><td class="mdescRight">define MMDC wait cycles before comparing data during calibration.  <a href="group__mmdc.html#gaa5c17a9bcd8ce97a1fcc27c61d672266">More...</a><br/></td></tr>
<tr class="separator:gaa5c17a9bcd8ce97a1fcc27c61d672266"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d4b7ce78c060bb39b54cede59a7eebf"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">mmdc_fine_tuning_dutycycle_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfaba47df8b4336aae312db7e1857c283bb">kMMDC_DutyHighPercent48_5</a> = 0x1U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152">kMMDC_DutyHighPercent50</a> = 0x2U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga6d4b7ce78c060bb39b54cede59a7eebfa8453b93e14a5aa4c713fe99c6ca98bbb">kMMDC_DutyHighPercent51_5</a> = 0x4U
<br/>
 }</td></tr>
<tr class="memdesc:ga6d4b7ce78c060bb39b54cede59a7eebf"><td class="mdescLeft">&#160;</td><td class="mdescRight">define MMDC parameter fine tuning duty cyle.  <a href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">More...</a><br/></td></tr>
<tr class="separator:ga6d4b7ce78c060bb39b54cede59a7eebf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga529bd493eff7d988996fd9a2adb60702"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga529bd493eff7d988996fd9a2adb60702">mmdc_termination_config_t</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702a68667a19b663483fc8e4fbbdbb8de200">kMMDC_RttNomDisabled</a> = 0x0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702a6fda4277a087d23aa397af235b9542ab">kMMDC_RttNom120ohm</a> = 0x1U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702a36691d8a9859ed4af1d7d0468b738c0f">kMMDC_RttNom60ohm</a> = 0x2U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702a1ddd8dc9bc7f849306db0d768abc6bea">kMMDC_RttNom40ohm</a> = 0x3U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702af6f21c8441c823dbc6350e4a81dc6b04">kMMDC_RttNom30ohm</a> = 0x4U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702a72003620557510f4ae3168a81b869ce8">kMMDC_RttNom24ohm</a> = 0x5U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702a255eb6781296999e1e7e01537b187b92">kMMDC_RttNom20ohm</a> = 0x6U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga529bd493eff7d988996fd9a2adb60702a344d3f3f6393b6ebf7253a769a223265">kMMDC_RttNom17ohm</a> = 0x7U
<br/>
 }</td></tr>
<tr class="memdesc:ga529bd493eff7d988996fd9a2adb60702"><td class="mdescLeft">&#160;</td><td class="mdescRight">define MMDC on chip termination configurations.  <a href="group__mmdc.html#ga529bd493eff7d988996fd9a2adb60702">More...</a><br/></td></tr>
<tr class="separator:ga529bd493eff7d988996fd9a2adb60702"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga23cec43724936b9388802c21e8fa08c4"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga23cec43724936b9388802c21e8fa08c4">_mmdc_lpddr2_derate</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga23cec43724936b9388802c21e8fa08c4ad533ead96774a60e7c897ca47070cd2b">kMMDC_NoUpdateDerate</a> = 0U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga23cec43724936b9388802c21e8fa08c4a35e7304955dc0243ae08727633784bc8">kMMDC_UpdateRefreshRate</a> = 0x01U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#gga23cec43724936b9388802c21e8fa08c4a35bdc3c7cc1e6709972eff3b7063923a">kMMDC_DerateTiming</a> = 0x02U
<br/>
 }</td></tr>
<tr class="memdesc:ga23cec43724936b9388802c21e8fa08c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">define LPDDR2 device derating type.  <a href="group__mmdc.html#ga23cec43724936b9388802c21e8fa08c4">More...</a><br/></td></tr>
<tr class="separator:ga23cec43724936b9388802c21e8fa08c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab979c4ca4f7ecf02e19ff0eb1945a7b3"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gab979c4ca4f7ecf02e19ff0eb1945a7b3">_mmdc_exaccess_type</a> { <br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab979c4ca4f7ecf02e19ff0eb1945a7b3a0d12e7538ff6f8c3a4df088ff58c31e9">kMMDC_ExMonitorID0</a> = 0x01U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab979c4ca4f7ecf02e19ff0eb1945a7b3aa726a3a7ed33477e1375f6dcc89fc908">kMMDC_ExMonitorID1</a> = 0x02U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab979c4ca4f7ecf02e19ff0eb1945a7b3a471e09c8e38c8dab5a6cccfc88d4d657">kMMDC_ExMonitorID2</a> = 0x04U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab979c4ca4f7ecf02e19ff0eb1945a7b3acf8a62170d4506198db2d3cfec81382e">kMMDC_ExMonitorID3</a> = 0x08U, 
<br/>
&#160;&#160;<a class="el" href="group__mmdc.html#ggab979c4ca4f7ecf02e19ff0eb1945a7b3a6baddad4bc8f93d87a9afcaed15b85ce">kMMDC_ExAccessResponse</a> = 0x10U
<br/>
 }</td></tr>
<tr class="memdesc:gab979c4ca4f7ecf02e19ff0eb1945a7b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC exclusive acess config type.  <a href="group__mmdc.html#gab979c4ca4f7ecf02e19ff0eb1945a7b3">More...</a><br/></td></tr>
<tr class="separator:gab979c4ca4f7ecf02e19ff0eb1945a7b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Driver version</h2></td></tr>
<tr class="memitem:ga28b345fb9e30acc4db920044260dc90a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga28b345fb9e30acc4db920044260dc90a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga28b345fb9e30acc4db920044260dc90a">FSL_MMDC_DRIVER_VERSION</a>&#160;&#160;&#160;(MAKE_VERSION(2U, 1U, 1U))</td></tr>
<tr class="memdesc:ga28b345fb9e30acc4db920044260dc90a"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC driver Version 2.1.1. <br/></td></tr>
<tr class="separator:ga28b345fb9e30acc4db920044260dc90a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga089d3d1785135d80df3aea773935c0f0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga089d3d1785135d80df3aea773935c0f0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga089d3d1785135d80df3aea773935c0f0">MMDC_TIMEOUT</a>&#160;&#160;&#160;(500U)</td></tr>
<tr class="memdesc:ga089d3d1785135d80df3aea773935c0f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC retry times. <br/></td></tr>
<tr class="separator:ga089d3d1785135d80df3aea773935c0f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0f494ba459a314456549b090ee37eaf8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga0f494ba459a314456549b090ee37eaf8">MMDC_READ_DQS_FINE_TUNING_MASK</a>&#160;&#160;&#160;(0x77777777U)</td></tr>
<tr class="memdesc:ga0f494ba459a314456549b090ee37eaf8"><td class="mdescLeft">&#160;</td><td class="mdescRight">&lt;  <a href="#ga0f494ba459a314456549b090ee37eaf8">More...</a><br/></td></tr>
<tr class="separator:ga0f494ba459a314456549b090ee37eaf8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa1e391854a8211cf82485ba138a6ef6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gaa1e391854a8211cf82485ba138a6ef6c">MMDC_WRITE_DQS_FINE_TUNING_MASK</a>&#160;&#160;&#160;(0xF3333333U)</td></tr>
<tr class="memdesc:gaa1e391854a8211cf82485ba138a6ef6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">&lt;  <a href="#gaa1e391854a8211cf82485ba138a6ef6c">More...</a><br/></td></tr>
<tr class="separator:gaa1e391854a8211cf82485ba138a6ef6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9fe42cdb61f734b49821ce4d8dffc71d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga9fe42cdb61f734b49821ce4d8dffc71d">MMDC_PRE_DEFINE_VALUE_DEFAULT</a>&#160;&#160;&#160;(0xCCU)</td></tr>
<tr class="memdesc:ga9fe42cdb61f734b49821ce4d8dffc71d"><td class="mdescLeft">&#160;</td><td class="mdescRight">&lt;  <a href="#ga9fe42cdb61f734b49821ce4d8dffc71d">More...</a><br/></td></tr>
<tr class="separator:ga9fe42cdb61f734b49821ce4d8dffc71d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafbe9b0464ecd382759e0e72c1aa0a5c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gafbe9b0464ecd382759e0e72c1aa0a5c4">MMDC_MEASUREUNIT_ERR_FREQ</a>&#160;&#160;&#160;(100000000U)</td></tr>
<tr class="memdesc:gafbe9b0464ecd382759e0e72c1aa0a5c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">&lt;  <a href="#gafbe9b0464ecd382759e0e72c1aa0a5c4">More...</a><br/></td></tr>
<tr class="separator:gafbe9b0464ecd382759e0e72c1aa0a5c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
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Initialization and deinitialization</h2></td></tr>
<tr class="memitem:ga0d157d874e73e4272da53690d85a9994"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga0d157d874e73e4272da53690d85a9994">MMDC_GetDefaultConfig</a> (<a class="el" href="group__mmdc.html#structmmdc__config__t">mmdc_config_t</a> *config)</td></tr>
<tr class="memdesc:ga0d157d874e73e4272da53690d85a9994"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module get the default configutation get timing/power/zq configuration.  <a href="#ga0d157d874e73e4272da53690d85a9994">More...</a><br/></td></tr>
<tr class="separator:ga0d157d874e73e4272da53690d85a9994"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaecda15e9ebcdb3bf10bc32d2ae5aaa57"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gaecda15e9ebcdb3bf10bc32d2ae5aaa57">MMDC_Init</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__config__t">mmdc_config_t</a> *config)</td></tr>
<tr class="memdesc:gaecda15e9ebcdb3bf10bc32d2ae5aaa57"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module initialization function.  <a href="#gaecda15e9ebcdb3bf10bc32d2ae5aaa57">More...</a><br/></td></tr>
<tr class="separator:gaecda15e9ebcdb3bf10bc32d2ae5aaa57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab970dabf8f5fa0862457888b55538b71"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gab970dabf8f5fa0862457888b55538b71">MMDC_Deinit</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:gab970dabf8f5fa0862457888b55538b71"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module deinit function.  <a href="#gab970dabf8f5fa0862457888b55538b71">More...</a><br/></td></tr>
<tr class="separator:gab970dabf8f5fa0862457888b55538b71"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
device operation</h2></td></tr>
<tr class="memitem:ga2f7d9adac4e0afe473d3f61ba1808cb9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga2f7d9adac4e0afe473d3f61ba1808cb9">MMDC_HandleCommand</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__cmd__config__t">mmdc_cmd_config_t</a> *config)</td></tr>
<tr class="memdesc:ga2f7d9adac4e0afe473d3f61ba1808cb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module process the command,support transfer multi cmd in once function call.  <a href="#ga2f7d9adac4e0afe473d3f61ba1808cb9">More...</a><br/></td></tr>
<tr class="separator:ga2f7d9adac4e0afe473d3f61ba1808cb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9fc681137f10766f57dec5ef73fb31d5"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga9fc681137f10766f57dec5ef73fb31d5">MMDC_GetReadData</a> (MMDC_Type *base, uint32_t *data)</td></tr>
<tr class="memdesc:ga9fc681137f10766f57dec5ef73fb31d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC get the read data.  <a href="#ga9fc681137f10766f57dec5ef73fb31d5">More...</a><br/></td></tr>
<tr class="separator:ga9fc681137f10766f57dec5ef73fb31d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7811cfe98b449114be6c1e82286fc35a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga7811cfe98b449114be6c1e82286fc35a">MMDC_EnhancePerformance</a> (MMDC_Type *base, const <a class="el" href="group__mmdc.html#structmmdc__performance__config__t">mmdc_performance_config_t</a> *config)</td></tr>
<tr class="memdesc:ga7811cfe98b449114be6c1e82286fc35a"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module enhance performance function.  <a href="#ga7811cfe98b449114be6c1e82286fc35a">More...</a><br/></td></tr>
<tr class="separator:ga7811cfe98b449114be6c1e82286fc35a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c528114a379a5c7462ec0d791b5b01b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga4c528114a379a5c7462ec0d791b5b01b">MMDC_EnableAutoRefresh</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a> *config)</td></tr>
<tr class="memdesc:ga4c528114a379a5c7462ec0d791b5b01b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable MMDC module periodic refresh scheme config.  <a href="#ga4c528114a379a5c7462ec0d791b5b01b">More...</a><br/></td></tr>
<tr class="separator:ga4c528114a379a5c7462ec0d791b5b01b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga74b74ee2ba8f78ea71293e5bd6132088"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga74b74ee2ba8f78ea71293e5bd6132088">MMDC_DisableAutoRefresh</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:ga74b74ee2ba8f78ea71293e5bd6132088"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable MMDC module periodic refresh scheme.  <a href="#ga74b74ee2ba8f78ea71293e5bd6132088">More...</a><br/></td></tr>
<tr class="separator:ga74b74ee2ba8f78ea71293e5bd6132088"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7789dbb9ed8822326e4e90ddca4a6955"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga7789dbb9ed8822326e4e90ddca4a6955">MMDC_EnablePowerSaving</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__power__config__t">mmdc_power_config_t</a> *config)</td></tr>
<tr class="memdesc:ga7789dbb9ed8822326e4e90ddca4a6955"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC enable automatic power saving.  <a href="#ga7789dbb9ed8822326e4e90ddca4a6955">More...</a><br/></td></tr>
<tr class="separator:ga7789dbb9ed8822326e4e90ddca4a6955"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0b5314c64a5f787a23f7455ffbcd50f1"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga0b5314c64a5f787a23f7455ffbcd50f1">MMDC_DisablePowerSaving</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:ga0b5314c64a5f787a23f7455ffbcd50f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">uint8_t targetCS,  <a href="#ga0b5314c64a5f787a23f7455ffbcd50f1">More...</a><br/></td></tr>
<tr class="separator:ga0b5314c64a5f787a23f7455ffbcd50f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32ab8f89b9988d9630a5629e5e8c6f0f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga32ab8f89b9988d9630a5629e5e8c6f0f">MMDC_Profiling</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__profiling__config__t">mmdc_profiling_config_t</a> *config)</td></tr>
<tr class="memdesc:ga32ab8f89b9988d9630a5629e5e8c6f0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC profiling mechanism.  <a href="#ga32ab8f89b9988d9630a5629e5e8c6f0f">More...</a><br/></td></tr>
<tr class="separator:ga32ab8f89b9988d9630a5629e5e8c6f0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga883bcb341062f84204c4fc701bd9a57b"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga883bcb341062f84204c4fc701bd9a57b">MMDC_LPDDR2UpdateDerate</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a> *config, uint32_t type)</td></tr>
<tr class="memdesc:ga883bcb341062f84204c4fc701bd9a57b"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC update device refresh rate and derate timing for LPDDR2 device only.  <a href="#ga883bcb341062f84204c4fc701bd9a57b">More...</a><br/></td></tr>
<tr class="separator:ga883bcb341062f84204c4fc701bd9a57b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga98c0bbaa9a9f7b38ff09106ace8578b1"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga98c0bbaa9a9f7b38ff09106ace8578b1">MMDC_MonitorLPDDR2OperationTemp</a> (MMDC_Type *base, uint32_t *mr4)</td></tr>
<tr class="memdesc:ga98c0bbaa9a9f7b38ff09106ace8578b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC device operation temp monitor function.  <a href="#ga98c0bbaa9a9f7b38ff09106ace8578b1">More...</a><br/></td></tr>
<tr class="separator:ga98c0bbaa9a9f7b38ff09106ace8578b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga742ad9d9890292b4225ce95c2589b2b9"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga742ad9d9890292b4225ce95c2589b2b9">MMDC_ReadDQSGatingCalibration</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__readDQS__calibration__config__t">mmdc_readDQS_calibration_config_t</a> *config)</td></tr>
<tr class="memdesc:ga742ad9d9890292b4225ce95c2589b2b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module read DQS gating calibration function.  <a href="#ga742ad9d9890292b4225ce95c2589b2b9">More...</a><br/></td></tr>
<tr class="separator:ga742ad9d9890292b4225ce95c2589b2b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga04e7f31eb9e8660911ebe1ff94e2a1b0"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga04e7f31eb9e8660911ebe1ff94e2a1b0">MMDC_WriteLevelingCalibration</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__writeLeveling__calibration__config__t">mmdc_writeLeveling_calibration_config_t</a> *config)</td></tr>
<tr class="memdesc:ga04e7f31eb9e8660911ebe1ff94e2a1b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module write leveling calibration function.  <a href="#ga04e7f31eb9e8660911ebe1ff94e2a1b0">More...</a><br/></td></tr>
<tr class="separator:ga04e7f31eb9e8660911ebe1ff94e2a1b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga70ecb44e60577b7ea9b5c4f3ab8e3bb7"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga70ecb44e60577b7ea9b5c4f3ab8e3bb7">MMDC_WriteCalibration</a> (MMDC_Type *base, mmdc_write_calibration_config_t *config)</td></tr>
<tr class="memdesc:ga70ecb44e60577b7ea9b5c4f3ab8e3bb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module write calibration function.  <a href="#ga70ecb44e60577b7ea9b5c4f3ab8e3bb7">More...</a><br/></td></tr>
<tr class="separator:ga70ecb44e60577b7ea9b5c4f3ab8e3bb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab303aaa4d6b2e9d820fdefcc81027500"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gab303aaa4d6b2e9d820fdefcc81027500">MMDC_ReadCalibration</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__read__calibration__config__t">mmdc_read_calibration_config_t</a> *config)</td></tr>
<tr class="memdesc:gab303aaa4d6b2e9d820fdefcc81027500"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module read calibration function.  <a href="#gab303aaa4d6b2e9d820fdefcc81027500">More...</a><br/></td></tr>
<tr class="separator:gab303aaa4d6b2e9d820fdefcc81027500"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a0d14e43a683ec74144b25a0a237b70"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga8a0d14e43a683ec74144b25a0a237b70">MMDC_DoFineTuning</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a> devType, <a class="el" href="group__mmdc.html#structmmdc__fine__tuning__config__t">mmdc_fine_tuning_config_t</a> *config)</td></tr>
<tr class="memdesc:ga8a0d14e43a683ec74144b25a0a237b70"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module read calibration function.  <a href="#ga8a0d14e43a683ec74144b25a0a237b70">More...</a><br/></td></tr>
<tr class="separator:ga8a0d14e43a683ec74144b25a0a237b70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb9812018f00456889c477cf6912a259"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gabb9812018f00456889c477cf6912a259">MMDC_SetTiming</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a> devType, <a class="el" href="group__mmdc.html#structmmdc__device__timing__t">mmdc_device_timing_t</a> *timing)</td></tr>
<tr class="memdesc:gabb9812018f00456889c477cf6912a259"><td class="mdescLeft">&#160;</td><td class="mdescRight">set timing parameter  <a href="#gabb9812018f00456889c477cf6912a259">More...</a><br/></td></tr>
<tr class="separator:gabb9812018f00456889c477cf6912a259"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae618022c552e73a6f1aaf0d564b80b25"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gae618022c552e73a6f1aaf0d564b80b25">MMDC_DeviceInit</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a> devType, uint8_t targetCS, <a class="el" href="group__mmdc.html#structmmdc__device__config__t">mmdc_device_config_t</a> *devConfig)</td></tr>
<tr class="memdesc:gae618022c552e73a6f1aaf0d564b80b25"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize MMDC controlled device.  <a href="#gae618022c552e73a6f1aaf0d564b80b25">More...</a><br/></td></tr>
<tr class="separator:gae618022c552e73a6f1aaf0d564b80b25"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3be318f0d898f614ca8c7745f106fcbc"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga3be318f0d898f614ca8c7745f106fcbc">MMDC_EnterConfigurationMode</a> (MMDC_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga3be318f0d898f614ca8c7745f106fcbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module enter/exit configuration mode function.  <a href="#ga3be318f0d898f614ca8c7745f106fcbc">More...</a><br/></td></tr>
<tr class="separator:ga3be318f0d898f614ca8c7745f106fcbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21e0aa01d80e2606b34fe679a36db426"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga21e0aa01d80e2606b34fe679a36db426">MMDC_DoZQCalibration</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a> devType, <a class="el" href="group__mmdc.html#structmmdc__zq__config__t">mmdc_zq_config_t</a> *zqCal)</td></tr>
<tr class="memdesc:ga21e0aa01d80e2606b34fe679a36db426"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC do ZQ calibration function.  <a href="#ga21e0aa01d80e2606b34fe679a36db426">More...</a><br/></td></tr>
<tr class="separator:ga21e0aa01d80e2606b34fe679a36db426"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85dafebb30860f10bf02787011574300"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga85dafebb30860f10bf02787011574300">MMDC_EnableLowPowerMode</a> (MMDC_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga85dafebb30860f10bf02787011574300"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC enable/disable low power mode Once enable device will enter self-refresh mode.  <a href="#ga85dafebb30860f10bf02787011574300">More...</a><br/></td></tr>
<tr class="separator:ga85dafebb30860f10bf02787011574300"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f10bac54dc076832a48fbded62fc2ae"><td class="memItemLeft" align="right" valign="top">status_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga7f10bac54dc076832a48fbded62fc2ae">MMDC_EnableDVFSMode</a> (MMDC_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga7f10bac54dc076832a48fbded62fc2ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC enable/disable dynamic frequency change mode Once enable device will enter self-refresh mode.  <a href="#ga7f10bac54dc076832a48fbded62fc2ae">More...</a><br/></td></tr>
<tr class="separator:ga7f10bac54dc076832a48fbded62fc2ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacff44aaf7720ea5c6681cdb972570e0b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gacff44aaf7720ea5c6681cdb972570e0b">MMDC_Reset</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:gacff44aaf7720ea5c6681cdb972570e0b"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC module reset function when you call this function will reset all internal register user need bo module init function bue do not need to do device init.  <a href="#gacff44aaf7720ea5c6681cdb972570e0b">More...</a><br/></td></tr>
<tr class="separator:gacff44aaf7720ea5c6681cdb972570e0b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga657ecbf7e5ca895a1f6f411001db99f0"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga657ecbf7e5ca895a1f6f411001db99f0">MMDC_SwitchDeviceFrequency</a> (MMDC_Type *base, void *ccm, void *iomux, uint32_t param, uint32_t codeAddr)</td></tr>
<tr class="memdesc:ga657ecbf7e5ca895a1f6f411001db99f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the mmdc switch frequency.  <a href="#ga657ecbf7e5ca895a1f6f411001db99f0">More...</a><br/></td></tr>
<tr class="separator:ga657ecbf7e5ca895a1f6f411001db99f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
debug</h2></td></tr>
<tr class="memitem:ga0cd67c384ad96fe13d279d75d9847fd4"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga0cd67c384ad96fe13d279d75d9847fd4">MMDC_EnableSBS</a> (MMDC_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga0cd67c384ad96fe13d279d75d9847fd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC enable/disable the SBS-step by step debug feature.  <a href="#ga0cd67c384ad96fe13d279d75d9847fd4">More...</a><br/></td></tr>
<tr class="separator:ga0cd67c384ad96fe13d279d75d9847fd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga61d5ca1396a4632713a71d534bd2885a"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga61d5ca1396a4632713a71d534bd2885a">MMDC_TriggerSBS</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:ga61d5ca1396a4632713a71d534bd2885a"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC trigger the MMDC dispatch the one pending request to device.  <a href="#ga61d5ca1396a4632713a71d534bd2885a">More...</a><br/></td></tr>
<tr class="separator:ga61d5ca1396a4632713a71d534bd2885a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga716f2a5bb9bf9c25bae8a059c206a0f8"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga716f2a5bb9bf9c25bae8a059c206a0f8">MMDC_GetAXIAddrBySBS</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:ga716f2a5bb9bf9c25bae8a059c206a0f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC get AXI ddr which was dispatched by MMDC in SBS mode.  <a href="#ga716f2a5bb9bf9c25bae8a059c206a0f8">More...</a><br/></td></tr>
<tr class="separator:ga716f2a5bb9bf9c25bae8a059c206a0f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4e768c43691cc1b3d2680153a69fddfe"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga4e768c43691cc1b3d2680153a69fddfe">MMDC_GetAXIAttributeBySBS</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:ga4e768c43691cc1b3d2680153a69fddfe"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC get AXI attribute which was dispatched by MMDC in SBS mode.  <a href="#ga4e768c43691cc1b3d2680153a69fddfe">More...</a><br/></td></tr>
<tr class="separator:ga4e768c43691cc1b3d2680153a69fddfe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga735d61870f42f9a05dc8d334f53fe1a0"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga735d61870f42f9a05dc8d334f53fe1a0">MMDC_EnableProfiling</a> (MMDC_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga735d61870f42f9a05dc8d334f53fe1a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC enable/disable profiling feature.  <a href="#ga735d61870f42f9a05dc8d334f53fe1a0">More...</a><br/></td></tr>
<tr class="separator:ga735d61870f42f9a05dc8d334f53fe1a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47aa7811da971655e360ce50e76b7aaf"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga47aa7811da971655e360ce50e76b7aaf">MMDC_ResumeProfiling</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:ga47aa7811da971655e360ce50e76b7aaf"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC resume profiling.  <a href="#ga47aa7811da971655e360ce50e76b7aaf">More...</a><br/></td></tr>
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<tr class="memitem:gac022fa9ee10973da6d178cf9414f7600"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#gac022fa9ee10973da6d178cf9414f7600">MMDC_ResetProfiling</a> (MMDC_Type *base)</td></tr>
<tr class="memdesc:gac022fa9ee10973da6d178cf9414f7600"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC reset profiling.  <a href="#gac022fa9ee10973da6d178cf9414f7600">More...</a><br/></td></tr>
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<tr class="memitem:ga74b53fa4937f4a4a2b0ba38bfd4a2159"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ga74b53fa4937f4a4a2b0ba38bfd4a2159">MMDC_ExclusiveAccess</a> (MMDC_Type *base, <a class="el" href="group__mmdc.html#structmmdc__exaccess__config__t">mmdc_exaccess_config_t</a> *config, uint32_t type)</td></tr>
<tr class="memdesc:ga74b53fa4937f4a4a2b0ba38bfd4a2159"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC exclusive access config function,config the monitor ID and response.  <a href="#ga74b53fa4937f4a4a2b0ba38bfd4a2159">More...</a><br/></td></tr>
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<hr/><h2 class="groupheader">Data Structure Documentation</h2>
<a name="structmmdc__readDQS__calibration__config__t" id="structmmdc__readDQS__calibration__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:ae8c05c5234608d9ee8728fb912164b25"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#ga947cb9e89a390cfc0fcce314f8dafdde">mmdc_calibration_type_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae8c05c5234608d9ee8728fb912164b25">mode</a></td></tr>
<tr class="memdesc:ae8c05c5234608d9ee8728fb912164b25"><td class="mdescLeft">&#160;</td><td class="mdescRight">select calibration mode.  <a href="#ae8c05c5234608d9ee8728fb912164b25">More...</a><br/></td></tr>
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<tr class="memitem:a6d28b7fc19be4104d43cb1ea0199e021"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#gaa5c17a9bcd8ce97a1fcc27c61d672266">mmdc_calibaration_waitcycles_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a6d28b7fc19be4104d43cb1ea0199e021">waitCycles</a></td></tr>
<tr class="memdesc:a6d28b7fc19be4104d43cb1ea0199e021"><td class="mdescLeft">&#160;</td><td class="mdescRight">MMDC wait cycles before comparing sample data.  <a href="#a6d28b7fc19be4104d43cb1ea0199e021">More...</a><br/></td></tr>
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<tr class="memitem:a326393d8ef153f2b251a5ff781bb6c91"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a326393d8ef153f2b251a5ff781bb6c91">dqsGatingHalfDelay0</a></td></tr>
<tr class="memdesc:a326393d8ef153f2b251a5ff781bb6c91"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read DQS gating half cycles delay count for Byte0.  <a href="#a326393d8ef153f2b251a5ff781bb6c91">More...</a><br/></td></tr>
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<tr class="memitem:a4a062a4fa730805f1d1515818fdf708a"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4a062a4fa730805f1d1515818fdf708a">dqsGatingAbsDelay0</a></td></tr>
<tr class="memdesc:a4a062a4fa730805f1d1515818fdf708a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Absolute read DQS gating delay offset for Byte0, So the total read DQS gating delay is (dqsGatingHalfDelay0)*0.5*cycle + (dqsGatingAbsDelay0)*1/256*cycle.  <a href="#a4a062a4fa730805f1d1515818fdf708a">More...</a><br/></td></tr>
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<tr class="memitem:a93c7a3251702f33001a66d6f0424a01d"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a93c7a3251702f33001a66d6f0424a01d">dqsGatingHalfDelay1</a></td></tr>
<tr class="memdesc:a93c7a3251702f33001a66d6f0424a01d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read DQS gating half cycles delay count for Byte1.  <a href="#a93c7a3251702f33001a66d6f0424a01d">More...</a><br/></td></tr>
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<tr class="memitem:ad29ec318ade00be37eb6f865c6d26789"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad29ec318ade00be37eb6f865c6d26789">dqsGatingAbsDelay1</a></td></tr>
<tr class="memdesc:ad29ec318ade00be37eb6f865c6d26789"><td class="mdescLeft">&#160;</td><td class="mdescRight">Absolute read DQS gating delay offset for Byte1, So the total read DQS gating delay is (dqsGatingHalfDelay1)*0.5*cycle + (dqsGatingAbsDelay1)*1/256*cycle.  <a href="#ad29ec318ade00be37eb6f865c6d26789">More...</a><br/></td></tr>
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<tr class="memitem:ad2554e29eefd15d81222e0b40ecbf8a8"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad2554e29eefd15d81222e0b40ecbf8a8">readDelay0</a></td></tr>
<tr class="memdesc:ad2554e29eefd15d81222e0b40ecbf8a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">When using hardware calibration(MPR/Predefined mode), user should input RD_DL_ABS_OFFSET to place read DQS inside the read DQ window.  <a href="#ad2554e29eefd15d81222e0b40ecbf8a8">More...</a><br/></td></tr>
<tr class="separator:ad2554e29eefd15d81222e0b40ecbf8a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae885f53ca890a0fec1f1a6fbbb5b7231"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae885f53ca890a0fec1f1a6fbbb5b7231">readDelay1</a></td></tr>
<tr class="memdesc:ae885f53ca890a0fec1f1a6fbbb5b7231"><td class="mdescLeft">&#160;</td><td class="mdescRight">When using hardware calibration(MPR/Predefined mode), user should input RD_DL_ABS_OFFSET to place read DQS inside the read DQ window.  <a href="#ae885f53ca890a0fec1f1a6fbbb5b7231">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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          <td class="memname"><a class="el" href="group__mmdc.html#gaa5c17a9bcd8ce97a1fcc27c61d672266">mmdc_calibaration_waitcycles_t</a> mmdc_readDQS_calibration_config_t::waitCycles</td>
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<a name="structmmdc__writeLeveling__calibration__config__t" id="structmmdc__writeLeveling__calibration__config__t"></a>
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          <td class="memname">struct mmdc_writeLeveling_calibration_config_t</td>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:aff48530182dec4d52b2f2f5f8a5209e4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#ga947cb9e89a390cfc0fcce314f8dafdde">mmdc_calibration_type_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aff48530182dec4d52b2f2f5f8a5209e4">mode</a></td></tr>
<tr class="memdesc:aff48530182dec4d52b2f2f5f8a5209e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">select calibration mode.  <a href="#aff48530182dec4d52b2f2f5f8a5209e4">More...</a><br/></td></tr>
<tr class="separator:aff48530182dec4d52b2f2f5f8a5209e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a669dd63db6e10249f4536bd5791310dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a669dd63db6e10249f4536bd5791310dc"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a669dd63db6e10249f4536bd5791310dc">wLevelingOneDelay0</a></td></tr>
<tr class="memdesc:a669dd63db6e10249f4536bd5791310dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write leveling one cycles delay count for Byte0. <br/></td></tr>
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<tr class="memitem:a628e5bd4f4bcab1089c63d5d15fa1004"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a628e5bd4f4bcab1089c63d5d15fa1004"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a628e5bd4f4bcab1089c63d5d15fa1004">wLevelingHalfDelay0</a></td></tr>
<tr class="memdesc:a628e5bd4f4bcab1089c63d5d15fa1004"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write leveling half cycles delay count for Byte0. <br/></td></tr>
<tr class="separator:a628e5bd4f4bcab1089c63d5d15fa1004"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a04673c19131bf00821f0877d9444aeb1"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a04673c19131bf00821f0877d9444aeb1">wLevelingAbsDelay0</a></td></tr>
<tr class="memdesc:a04673c19131bf00821f0877d9444aeb1"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">             Absolute Write leveling delay offset for Byte0, So the total delay is the sum of
</pre><p> (wLevelingAbsDelay0/256*cycle) + (wLevelingHalfDelay0*halfcycle) + (wLevelingOneDelay0*cycle).  <a href="#a04673c19131bf00821f0877d9444aeb1">More...</a><br/></td></tr>
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<tr class="memitem:a6fca02b75679c18a673746e327da4a3b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6fca02b75679c18a673746e327da4a3b"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a6fca02b75679c18a673746e327da4a3b">wLevelingOneDelay1</a></td></tr>
<tr class="memdesc:a6fca02b75679c18a673746e327da4a3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write leveling one cycles delay count for Byte1. <br/></td></tr>
<tr class="separator:a6fca02b75679c18a673746e327da4a3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0666cb137b176d4f022c15891c70fad9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0666cb137b176d4f022c15891c70fad9"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a0666cb137b176d4f022c15891c70fad9">wLevelingHalfDelay1</a></td></tr>
<tr class="memdesc:a0666cb137b176d4f022c15891c70fad9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write leveling half cycles delay count for Byte1. <br/></td></tr>
<tr class="separator:a0666cb137b176d4f022c15891c70fad9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae66508f6a3a5758338a2122aef5e83b4"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae66508f6a3a5758338a2122aef5e83b4">wLevelingAbsDelay1</a></td></tr>
<tr class="memdesc:ae66508f6a3a5758338a2122aef5e83b4"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">             Absolute Write leveling delay offset for Byte1, So the total delay is the sum of
</pre><p> (wLevelingAbsDelay1/256*cycle) + (wLevelingHalfDelay1*halfcycle) + (wLevelingOneDelay1*cycle).  <a href="#ae66508f6a3a5758338a2122aef5e83b4">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<a name="structmmdc__read__calibration__config__t" id="structmmdc__read__calibration__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:a16a101ea88a067d05b51e350a6f09160"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#ga947cb9e89a390cfc0fcce314f8dafdde">mmdc_calibration_type_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a16a101ea88a067d05b51e350a6f09160">mode</a></td></tr>
<tr class="memdesc:a16a101ea88a067d05b51e350a6f09160"><td class="mdescLeft">&#160;</td><td class="mdescRight">select calibration mode.  <a href="#a16a101ea88a067d05b51e350a6f09160">More...</a><br/></td></tr>
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<tr class="memitem:ad91f9834674cab234176e700bf02e3a6"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad91f9834674cab234176e700bf02e3a6">readDelay0</a></td></tr>
<tr class="memdesc:ad91f9834674cab234176e700bf02e3a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">delay between read DQS strobe and read data of Byte0, RD_DL_ABS_OFFSET0.  <a href="#ad91f9834674cab234176e700bf02e3a6">More...</a><br/></td></tr>
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<tr class="memitem:afe9174e6c85975ea8187ba1707064352"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#afe9174e6c85975ea8187ba1707064352">readDelay1</a></td></tr>
<tr class="memdesc:afe9174e6c85975ea8187ba1707064352"><td class="mdescLeft">&#160;</td><td class="mdescRight">delay between read DQS strobe and read data of Byte1, RD_DL_ABS_OFFSET1.  <a href="#afe9174e6c85975ea8187ba1707064352">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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          <td class="memname"><a class="el" href="group__mmdc.html#ga947cb9e89a390cfc0fcce314f8dafdde">mmdc_calibration_type_t</a> mmdc_read_calibration_config_t::mode</td>
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<p>The delay of the delay-line would be (RD_DL_ABS_OFFSET0 / 256) * MMDC AXIclock (fast clock). when using hardware calibration(MPR/Predefined mode), user should input RD_DL_ABS_OFFSET0 to place read DQS inside the read DQ window. </p>

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<p>The delay of the delay-line would be (RD_DL_ABS_OFFSET1 / 256) * MMDC AXIclock (fast clock). when using hardware calibration(MPR/Predefined mode), user should input RD_DL_ABS_OFFSET1 to place read DQS inside the read DQ window. </p>

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<a name="structmmdc__fine__tuning__config__t" id="structmmdc__fine__tuning__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:a9ef4a6eda7900741d9f5ad768259ca98"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9ef4a6eda7900741d9f5ad768259ca98"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a9ef4a6eda7900741d9f5ad768259ca98">rDQOffset0</a></td></tr>
<tr class="memdesc:a9ef4a6eda7900741d9f5ad768259ca98"><td class="mdescLeft">&#160;</td><td class="mdescRight">fine-tuning adjustment to every bit in the read DQ byte0 relative to the read DQS, max dealy units can be add is 7 <br/></td></tr>
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<tr class="memitem:ad52a8262514e864e6c2a557f11969558"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad52a8262514e864e6c2a557f11969558"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad52a8262514e864e6c2a557f11969558">rDQOffset1</a></td></tr>
<tr class="memdesc:ad52a8262514e864e6c2a557f11969558"><td class="mdescLeft">&#160;</td><td class="mdescRight">fine-tuning adjustment to every bit in the read DQ byte1 relative to the read DQS, max dealy units can be add is 7 <br/></td></tr>
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<tr class="memitem:a5a692fc2f2c628743afe58b0f0c70362"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5a692fc2f2c628743afe58b0f0c70362"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a5a692fc2f2c628743afe58b0f0c70362">wDQOffset0</a></td></tr>
<tr class="memdesc:a5a692fc2f2c628743afe58b0f0c70362"><td class="mdescLeft">&#160;</td><td class="mdescRight">fine-tuning adjustment to every bit in the write DQ byte0 relative to the write DQS, max dealy units can be add is 7 <br/></td></tr>
<tr class="separator:a5a692fc2f2c628743afe58b0f0c70362"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5b1ddfc7992f9ad661c06ba3ea8a0c1c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5b1ddfc7992f9ad661c06ba3ea8a0c1c"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a5b1ddfc7992f9ad661c06ba3ea8a0c1c">wDQOffset1</a></td></tr>
<tr class="memdesc:a5b1ddfc7992f9ad661c06ba3ea8a0c1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">fine-tuning adjustment to every bit in the write DQ byte1 relative to the write DQS, max dealy units can be add is 7 <br/></td></tr>
<tr class="separator:a5b1ddfc7992f9ad661c06ba3ea8a0c1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a09da98b7d6707e0d6b2f3bc8b8f33ef6"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a09da98b7d6707e0d6b2f3bc8b8f33ef6">caDelay</a></td></tr>
<tr class="memdesc:a09da98b7d6707e0d6b2f3bc8b8f33ef6"><td class="mdescLeft">&#160;</td><td class="mdescRight">CA delay line fine tuning parameter.  <a href="#a09da98b7d6707e0d6b2f3bc8b8f33ef6">More...</a><br/></td></tr>
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<a class="el" href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">mmdc_fine_tuning_dutycycle_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4c525f3bae79b750b725060f6a85de2c">rDQDuty0</a></td></tr>
<tr class="memdesc:a4c525f3bae79b750b725060f6a85de2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read DQS duty cycle fine tuning control of Byte1. <br/></td></tr>
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<tr class="memitem:adaef35ea7b5351b77fc6c09288c971a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="adaef35ea7b5351b77fc6c09288c971a5"></a>
<a class="el" href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">mmdc_fine_tuning_dutycycle_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#adaef35ea7b5351b77fc6c09288c971a5">rDQDuty1</a></td></tr>
<tr class="memdesc:adaef35ea7b5351b77fc6c09288c971a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read DQS duty cycle fine tuning control of Byte0. <br/></td></tr>
<tr class="separator:adaef35ea7b5351b77fc6c09288c971a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a545054c1d7151dca08473e681d6f6465"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a545054c1d7151dca08473e681d6f6465"></a>
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<tr class="memdesc:a545054c1d7151dca08473e681d6f6465"><td class="mdescLeft">&#160;</td><td class="mdescRight">Primary duty cycle fine tuning control of DDR clock. <br/></td></tr>
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<tr class="memitem:a18e3dc7fef1d3d72da5a314852d0067f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a18e3dc7fef1d3d72da5a314852d0067f"></a>
<a class="el" href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">mmdc_fine_tuning_dutycycle_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a18e3dc7fef1d3d72da5a314852d0067f">ddrCKDutyCtl1</a></td></tr>
<tr class="memdesc:a18e3dc7fef1d3d72da5a314852d0067f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Secondary duty cycle fine tuning control of DDR clock. <br/></td></tr>
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<tr class="memitem:ad8322ebf21ae1658e6f14e6c231f3976"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad8322ebf21ae1658e6f14e6c231f3976"></a>
<a class="el" href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">mmdc_fine_tuning_dutycycle_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad8322ebf21ae1658e6f14e6c231f3976">wDQDuty0</a></td></tr>
<tr class="memdesc:ad8322ebf21ae1658e6f14e6c231f3976"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write DQS duty cycle fine tuning control of Byte0. <br/></td></tr>
<tr class="separator:ad8322ebf21ae1658e6f14e6c231f3976"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4779a3cc26a72ff5f3b4f1a8ae767101"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4779a3cc26a72ff5f3b4f1a8ae767101"></a>
<a class="el" href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">mmdc_fine_tuning_dutycycle_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4779a3cc26a72ff5f3b4f1a8ae767101">wDQDuty1</a></td></tr>
<tr class="memdesc:a4779a3cc26a72ff5f3b4f1a8ae767101"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write DQS duty cycle fine tuning control of Byte1. <br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<a name="structmmdc__odt__config__t" id="structmmdc__odt__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:adcecd285d91a931618e7692165144bb9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#ga529bd493eff7d988996fd9a2adb60702">mmdc_termination_config_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#adcecd285d91a931618e7692165144bb9">odtByte0Config</a></td></tr>
<tr class="memdesc:adcecd285d91a931618e7692165144bb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">On chip ODT byte1 resistor.  <a href="#adcecd285d91a931618e7692165144bb9">More...</a><br/></td></tr>
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<tr class="memitem:a6da4ed1e5963dac21cd8835282dc09fe"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a6da4ed1e5963dac21cd8835282dc09fe">enableActiveReadOdt</a></td></tr>
<tr class="memdesc:a6da4ed1e5963dac21cd8835282dc09fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">On chip ODT byte0 resistor.  <a href="#a6da4ed1e5963dac21cd8835282dc09fe">More...</a><br/></td></tr>
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<tr class="memitem:a4536e2e7af79abe0e0010e0d14fb244c"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4536e2e7af79abe0e0010e0d14fb244c">enableInactiveReadOdt</a></td></tr>
<tr class="memdesc:a4536e2e7af79abe0e0010e0d14fb244c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active read CS ODT enable.  <a href="#a4536e2e7af79abe0e0010e0d14fb244c">More...</a><br/></td></tr>
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<tr class="memitem:a5ea469fe0f5e57d00ddcb6c009a21139"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a5ea469fe0f5e57d00ddcb6c009a21139">enableActiveWriteOdt</a></td></tr>
<tr class="memdesc:a5ea469fe0f5e57d00ddcb6c009a21139"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inactive read CS ODT enable.  <a href="#a5ea469fe0f5e57d00ddcb6c009a21139">More...</a><br/></td></tr>
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<tr class="memitem:ad5aa8d2b514201e2f97a13468f1996cb"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad5aa8d2b514201e2f97a13468f1996cb">enableInactiveWriteOdt</a></td></tr>
<tr class="memdesc:ad5aa8d2b514201e2f97a13468f1996cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active write CS ODT enable.  <a href="#ad5aa8d2b514201e2f97a13468f1996cb">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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          <td class="memname"><a class="el" href="group__mmdc.html#ga529bd493eff7d988996fd9a2adb60702">mmdc_termination_config_t</a> mmdc_odt_config_t::odtByte0Config</td>
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<a name="structmmdc__power__config__t" id="structmmdc__power__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:a57a348783ed30dc9b4c7ceace5cae325"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a57a348783ed30dc9b4c7ceace5cae325"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a57a348783ed30dc9b4c7ceace5cae325">wIdle</a></td></tr>
<tr class="memdesc:a57a348783ed30dc9b4c7ceace5cae325"><td class="mdescLeft">&#160;</td><td class="mdescRight">get write request buffer Idle status <br/></td></tr>
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<tr class="memitem:a16b0d63b530441a68550d5e24457e4fc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a16b0d63b530441a68550d5e24457e4fc"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a16b0d63b530441a68550d5e24457e4fc">rIdle</a></td></tr>
<tr class="memdesc:a16b0d63b530441a68550d5e24457e4fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">get read request buffer Idle status <br/></td></tr>
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<tr class="memitem:ae979c04012bb551e5d9a1ecfa367d30e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae979c04012bb551e5d9a1ecfa367d30e"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae979c04012bb551e5d9a1ecfa367d30e">isInAutoPS</a></td></tr>
<tr class="memdesc:ae979c04012bb551e5d9a1ecfa367d30e"><td class="mdescLeft">&#160;</td><td class="mdescRight">indicate mmdc if in a automatic power saving mode <br/></td></tr>
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<tr class="memitem:a80c1124c89f0b4ab45892e14a97f91aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a80c1124c89f0b4ab45892e14a97f91aa"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a80c1124c89f0b4ab45892e14a97f91aa">idleClockToPS</a></td></tr>
<tr class="memdesc:a80c1124c89f0b4ab45892e14a97f91aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the idle clock which device will automatically enter auto self-refresh mode ,default is 1024 clock cycles, max is 16320 cycles,calucate formula is idleClockToPS * 64 = idle clock note: idleClockToPS = 0 is forbidden <br/></td></tr>
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<tr class="memitem:a1b1642e4023150c2871d2495ef63bca4"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a1b1642e4023150c2871d2495ef63bca4">idleClockToPrecharge0</a></td></tr>
<tr class="memdesc:a1b1642e4023150c2871d2495ef63bca4"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the idle clock which device will automatically precharged.  <a href="#a1b1642e4023150c2871d2495ef63bca4">More...</a><br/></td></tr>
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<tr class="memitem:a476077bfcbb201fb0ff8247b009c0227"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a476077bfcbb201fb0ff8247b009c0227"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a476077bfcbb201fb0ff8247b009c0227">idleClockToPD0</a></td></tr>
<tr class="memdesc:a476077bfcbb201fb0ff8247b009c0227"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the idle clock which device will enter power down, default is disable ,max clock is 32768 clocks, calucate formula idleClockToPD *16 = idle clock <br/></td></tr>
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<tr class="memitem:af6c208cb0b4976b7d241f526283f0760"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#af6c208cb0b4976b7d241f526283f0760">idleClockToPrecharge1</a></td></tr>
<tr class="memdesc:af6c208cb0b4976b7d241f526283f0760"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the idle clock which device will automatically precharged.  <a href="#af6c208cb0b4976b7d241f526283f0760">More...</a><br/></td></tr>
<tr class="separator:af6c208cb0b4976b7d241f526283f0760"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0f2f22c6c1f40380b7746fd27f10c5e4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0f2f22c6c1f40380b7746fd27f10c5e4"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a0f2f22c6c1f40380b7746fd27f10c5e4">idleClockToPD1</a></td></tr>
<tr class="memdesc:a0f2f22c6c1f40380b7746fd27f10c5e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the idle clock which device will enter power down, default is disable ,max clock is 32768 clocks, calucate formula idleClockToPD *16 = idle clock <br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<p>default is disable ,max clock is 128 clocks, calucate formula 2^idleClockToPrecharge = idle clock </p>

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<p>default is disable ,max clock is 128 clocks, calucate formula 2^idleClockToPrecharge = idle clock </p>

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<a name="structmmdc__zq__config__t" id="structmmdc__zq__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:a318492ee5cf973302895fa53ca77821b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#gad35261414c9c921bc08b8ffcddf817ff">mmdc_zq_calmode_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a318492ee5cf973302895fa53ca77821b">mode</a></td></tr>
<tr class="memdesc:a318492ee5cf973302895fa53ca77821b"><td class="mdescLeft">&#160;</td><td class="mdescRight">zq calibration mode.  <a href="#a318492ee5cf973302895fa53ca77821b">More...</a><br/></td></tr>
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<tr class="memitem:a355eb118ffb81fd90cd6bd32071f76d2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a355eb118ffb81fd90cd6bd32071f76d2"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a355eb118ffb81fd90cd6bd32071f76d2">earlyCompTimer</a></td></tr>
<tr class="memdesc:a355eb118ffb81fd90cd6bd32071f76d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">this field define the interval between the warming up of the comp of the ultra cal pad and the begining of the ZQ cal process with pads <br/></td></tr>
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<tr class="memitem:a41f856b0d5fd000293ae71af09b9dbfa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a41f856b0d5fd000293ae71af09b9dbfa"></a>
uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a41f856b0d5fd000293ae71af09b9dbfa">tZQCl_Clocks</a></td></tr>
<tr class="memdesc:a41f856b0d5fd000293ae71af09b9dbfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is the period of time that the MMDC has to wait after sending a short ZQ calibration and before sending other commands,max value 112 cycles,see RM for more detail ,lpddr2 device default is 360ns. <br/></td></tr>
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<tr class="memitem:a3b00df31d74542400d2c3f725ecef5ac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a3b00df31d74542400d2c3f725ecef5ac"></a>
uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a3b00df31d74542400d2c3f725ecef5ac">tZQCs_Clocks</a></td></tr>
<tr class="memdesc:a3b00df31d74542400d2c3f725ecef5ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is the period of time that the MMDC has to wait after sending a long ZQ calibration and before sending other commands. <br/></td></tr>
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<tr class="memitem:a2433dbac8005fdd4f08ea2c3f5a7923f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a2433dbac8005fdd4f08ea2c3f5a7923f"></a>
uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a2433dbac8005fdd4f08ea2c3f5a7923f">tZQInit_Clocks</a></td></tr>
<tr class="memdesc:a2433dbac8005fdd4f08ea2c3f5a7923f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is the period of time that the MMDC has to wait after sending a init ZQ calibration and before sending other commands.lpddr2 device default is 1us. <br/></td></tr>
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<tr class="memitem:ab21a4a5df7ae726d036942e2330187e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab21a4a5df7ae726d036942e2330187e5"></a>
<a class="el" href="group__mmdc.html#ga468f46beeb78ef3cf23b392243a3cbea">mmdc_zq_calfreq_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab21a4a5df7ae726d036942e2330187e5">hwZQFreq</a></td></tr>
<tr class="memdesc:ab21a4a5df7ae726d036942e2330187e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">ZQ periodic calibration freq. <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a13a4588d770bddbebba241900410a987">cmpOutSample</a></td></tr>
<tr class="memdesc:a13a4588d770bddbebba241900410a987"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the amount of cycle between driving the ZQ signal to pad and till sampling the cmp enable output <br/></td></tr>
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<tr class="memitem:ad9cdff593ac028442a30612f2ccd4cd1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad9cdff593ac028442a30612f2ccd4cd1"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad9cdff593ac028442a30612f2ccd4cd1">hwPullDownOffset</a></td></tr>
<tr class="memdesc:ad9cdff593ac028442a30612f2ccd4cd1"><td class="mdescLeft">&#160;</td><td class="mdescRight">define ZQ hardware pull down offset, used for fine tuning <br/></td></tr>
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<tr class="memitem:a53faed513288ab0bbaa6bc3e67fdb549"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a53faed513288ab0bbaa6bc3e67fdb549"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a53faed513288ab0bbaa6bc3e67fdb549">hwPullUpOffset</a></td></tr>
<tr class="memdesc:a53faed513288ab0bbaa6bc3e67fdb549"><td class="mdescLeft">&#160;</td><td class="mdescRight">define ZQ hardware pull up offset, used for fine tuning <br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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          <td class="memname"><a class="el" href="group__mmdc.html#gad35261414c9c921bc08b8ffcddf817ff">mmdc_zq_calmode_t</a> mmdc_zq_config_t::mode</td>
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<a name="structmmdc__cmd__config__t" id="structmmdc__cmd__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:aac5b1b6fb7042726ecab5dd9ba0e5c0e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aac5b1b6fb7042726ecab5dd9ba0e5c0e"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aac5b1b6fb7042726ecab5dd9ba0e5c0e">argMsb</a></td></tr>
<tr class="memdesc:aac5b1b6fb7042726ecab5dd9ba0e5c0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the CMD_ADDR_MSB_MR_OP, for lpddr2 device this field is mode register oprand <br/></td></tr>
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<tr class="memitem:af5b958ba81bbe75adb3bb04440b16f04"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af5b958ba81bbe75adb3bb04440b16f04"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#af5b958ba81bbe75adb3bb04440b16f04">argLsb</a></td></tr>
<tr class="memdesc:af5b958ba81bbe75adb3bb04440b16f04"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the CMD_ADDR_LSB_MR_ADDR,for lpddr2 device this field is mode register addr <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a12533ca923f7966880d04809251c13ba">bankAddr</a></td></tr>
<tr class="memdesc:a12533ca923f7966880d04809251c13ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the bank address,this field not relate with lpddr2 device <br/></td></tr>
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<tr class="memitem:aee2663bd4cc01702628f4581f03c58bf"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aee2663bd4cc01702628f4581f03c58bf">targetCS</a></td></tr>
<tr class="memdesc:aee2663bd4cc01702628f4581f03c58bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">select which CS to drive low.  <a href="#aee2663bd4cc01702628f4581f03c58bf">More...</a><br/></td></tr>
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<a class="el" href="group__mmdc.html#gaddb10c3c6cddcf3cb846cdc171fc127e">mmdc_cmd_type_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a9f9ccfcb2983370a37d2719fd4e88c61">cmd</a></td></tr>
<tr class="memdesc:a9f9ccfcb2983370a37d2719fd4e88c61"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the cmd to be send <br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<a name="structmmdc__device__timing__t" id="structmmdc__device__timing__t"></a>
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<div class="textblock"><p>clocks is ddr clock,(a+b), a is the value write to reigster,b is offset </p>
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<tr class="memitem:a50aaadddc98ff8bb672d5b31de1dbaf0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a50aaadddc98ff8bb672d5b31de1dbaf0"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a50aaadddc98ff8bb672d5b31de1dbaf0">tRFC_Clocks</a></td></tr>
<tr class="memdesc:a50aaadddc98ff8bb672d5b31de1dbaf0"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">Refresh cmd to active or refresh cmd time
</pre><p> default is (0x32+1) clocks,max is (255+1) clocks <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aa2e3ee1644be74de984d3fc777a72127">tCKSRX_Clocks</a></td></tr>
<tr class="memdesc:aa2e3ee1644be74de984d3fc777a72127"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">Valid clock before self-refresh exit,self-refresh timing
</pre><p> default is 2 clocks,max is 7 clocks <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a51f81a12dbf18fa4b6a0ab5965f0832e">tCKSRE_Clocks</a></td></tr>
<tr class="memdesc:a51f81a12dbf18fa4b6a0ab5965f0832e"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">Valid clock after self-refresh entry,self-refresh timing
</pre><p> default is 2 clocks.max is 7 clocks <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#afd6de7ba7e579c1ec4a0741b1df77223">tXSR_Clocks</a></td></tr>
<tr class="memdesc:afd6de7ba7e579c1ec4a0741b1df77223"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">exit self refresh to a valid cmd,self-refresh timing
</pre><p> min value should set to 0x16,represent 23 clocks,max is 256 clocks <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad574ea09c5d52a5bc9aba3717c23ba11">tCKE_Clocks</a></td></tr>
<tr class="memdesc:ad574ea09c5d52a5bc9aba3717c23ba11"><td class="mdescLeft">&#160;</td><td class="mdescRight">CKE minimum pulse width,default is (3+1) clocks,max is (7+1) clocks. <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#adfe3b34d153bcaa89b2cc296362564c3">tCL_Clocks</a></td></tr>
<tr class="memdesc:adfe3b34d153bcaa89b2cc296362564c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">CAS read latency,default is(3+3) clocks, max is (8+3) clocks. <br/></td></tr>
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uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab9db6e025d0cc9538ecbbc2eb0045376">tCWL_Clocks</a></td></tr>
<tr class="memdesc:ab9db6e025d0cc9538ecbbc2eb0045376"><td class="mdescLeft">&#160;</td><td class="mdescRight">CAS write latency, default is (3+1)clocks, max is (6+1) clocks. <br/></td></tr>
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<tr class="memitem:a04b132c8b200114bdb6f66cc28847832"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a04b132c8b200114bdb6f66cc28847832"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a04b132c8b200114bdb6f66cc28847832">ralat_Clocks</a></td></tr>
<tr class="memdesc:a04b132c8b200114bdb6f66cc28847832"><td class="mdescLeft">&#160;</td><td class="mdescRight">define write additional latency in misc, default is disable, max is (7+2)clocks <br/></td></tr>
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<tr class="memitem:abc283abd45a2ca3bc3c7e93c6a2236b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="abc283abd45a2ca3bc3c7e93c6a2236b1"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#abc283abd45a2ca3bc3c7e93c6a2236b1">walat_Clocks</a></td></tr>
<tr class="memdesc:abc283abd45a2ca3bc3c7e93c6a2236b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">define read additional latency in misc, default is disable, max is 3 clocks <br/></td></tr>
<tr class="separator:abc283abd45a2ca3bc3c7e93c6a2236b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8a8863296fec6ce4596b4b7c3c6cc5fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a8a8863296fec6ce4596b4b7c3c6cc5fb"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a8a8863296fec6ce4596b4b7c3c6cc5fb">tFAW_Clocks</a></td></tr>
<tr class="memdesc:a8a8863296fec6ce4596b4b7c3c6cc5fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Four bank active window,all bank,default is (6+1) clocks,max is (31+1)clocks. <br/></td></tr>
<tr class="separator:a8a8863296fec6ce4596b4b7c3c6cc5fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aabf4a5d3ccc64b1b0da432227a72b2a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aabf4a5d3ccc64b1b0da432227a72b2a4"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aabf4a5d3ccc64b1b0da432227a72b2a4">tRAS_Clocks</a></td></tr>
<tr class="memdesc:aabf4a5d3ccc64b1b0da432227a72b2a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">row active time,Active to Precharge cmd period,same bank,default is (9+1) clocks ,max is (30+1)clocks <br/></td></tr>
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<tr class="memitem:a353f413baa7451efafe4bcf5f13ccb78"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a353f413baa7451efafe4bcf5f13ccb78"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a353f413baa7451efafe4bcf5f13ccb78">tRC_Clocks</a></td></tr>
<tr class="memdesc:a353f413baa7451efafe4bcf5f13ccb78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active to active or refresh cmd period,default is (0+1)clocks,max is (62+1)clocks. <br/></td></tr>
<tr class="separator:a353f413baa7451efafe4bcf5f13ccb78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a892d8b6cfa87370eaa5ac0cf2f90467e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a892d8b6cfa87370eaa5ac0cf2f90467e"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a892d8b6cfa87370eaa5ac0cf2f90467e">tRCD_Clocks</a></td></tr>
<tr class="memdesc:a892d8b6cfa87370eaa5ac0cf2f90467e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active cmd to internal read/write delay time,default is 0+1 clocks,max is 14+1 clocks. <br/></td></tr>
<tr class="separator:a892d8b6cfa87370eaa5ac0cf2f90467e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a28f5f240aab5f1e493321b2be797647b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a28f5f240aab5f1e493321b2be797647b"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a28f5f240aab5f1e493321b2be797647b">tRP_Clocks</a></td></tr>
<tr class="memdesc:a28f5f240aab5f1e493321b2be797647b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precharge cmd period-per bank,default is 0+1 clock,max is 14+1 clocks. <br/></td></tr>
<tr class="separator:a28f5f240aab5f1e493321b2be797647b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af34aeb6a38c3586cf2bdfb24677f5c7a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af34aeb6a38c3586cf2bdfb24677f5c7a"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#af34aeb6a38c3586cf2bdfb24677f5c7a">tRPA_Clocks</a></td></tr>
<tr class="memdesc:af34aeb6a38c3586cf2bdfb24677f5c7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precharge cmd period-all bank,default is 0+1 clock,max is 14+1 clocks. <br/></td></tr>
<tr class="separator:af34aeb6a38c3586cf2bdfb24677f5c7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a27113fa22ea1fad6b3c10b680c10ba25"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a27113fa22ea1fad6b3c10b680c10ba25"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a27113fa22ea1fad6b3c10b680c10ba25">tWR_Clocks</a></td></tr>
<tr class="memdesc:a27113fa22ea1fad6b3c10b680c10ba25"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write recovery time,default is 0+1 clock,max is 7+1 clocks. <br/></td></tr>
<tr class="separator:a27113fa22ea1fad6b3c10b680c10ba25"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8bd3aeca187684846fde258f2d7b963e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a8bd3aeca187684846fde258f2d7b963e"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a8bd3aeca187684846fde258f2d7b963e">tMRD_Clocks</a></td></tr>
<tr class="memdesc:a8bd3aeca187684846fde258f2d7b963e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mode register set cmd cycle,should set to max(tMRR,tMRW), default is 1+1 clock,max is 15+1 clocks. <br/></td></tr>
<tr class="separator:a8bd3aeca187684846fde258f2d7b963e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a21363f75b12fd9ca71e1c87a2c5d869a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a21363f75b12fd9ca71e1c87a2c5d869a"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a21363f75b12fd9ca71e1c87a2c5d869a">tRTP_Clocks</a></td></tr>
<tr class="memdesc:a21363f75b12fd9ca71e1c87a2c5d869a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal read cmd to pre-charge cmd delay,default is 2+1 clock,max is 7+1 clocks. <br/></td></tr>
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<tr class="memitem:ab1fd71d8c451e36e4e82bb443ece7f25"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab1fd71d8c451e36e4e82bb443ece7f25"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab1fd71d8c451e36e4e82bb443ece7f25">tWTR_Clocks</a></td></tr>
<tr class="memdesc:ab1fd71d8c451e36e4e82bb443ece7f25"><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal write cmd to read cmd delay,default is 2+1 clock,max is 7+1 clocks. <br/></td></tr>
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<tr class="memitem:a96a83ff903ecd3927d1d6413097c08e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a96a83ff903ecd3927d1d6413097c08e0"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a96a83ff903ecd3927d1d6413097c08e0">tRRD_Clocks</a></td></tr>
<tr class="memdesc:a96a83ff903ecd3927d1d6413097c08e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">active bankA to active bankB ,Internal read cmd to pre-charge cmd, default is 0+1 clock,max is 6+1 clocks <br/></td></tr>
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<tr class="memitem:a71bdcdec1cb6bdbf8ae705fec97c9907"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a71bdcdec1cb6bdbf8ae705fec97c9907"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a71bdcdec1cb6bdbf8ae705fec97c9907">tXP_Clocks</a></td></tr>
<tr class="memdesc:a71bdcdec1cb6bdbf8ae705fec97c9907"><td class="mdescLeft">&#160;</td><td class="mdescRight">exit power down to any cmd, default (1+1) clocks, max is (7 +1) clocks <br/></td></tr>
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<tr class="memitem:a5f97a28a1da143e676c958005872da72"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5f97a28a1da143e676c958005872da72"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a5f97a28a1da143e676c958005872da72">tRSTtoCKE_Clocks</a></td></tr>
<tr class="memdesc:a5f97a28a1da143e676c958005872da72"><td class="mdescLeft">&#160;</td><td class="mdescRight">idle time until first reset is assert,default is 14-2 clock,max is 0X3f-2 clocks,for LPDDR2 device default is 200us <br/></td></tr>
<tr class="separator:a5f97a28a1da143e676c958005872da72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa74ac795b9d382a99a614e843fb2495f"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aa74ac795b9d382a99a614e843fb2495f">tDAI_Clocks</a></td></tr>
<tr class="memdesc:aa74ac795b9d382a99a614e843fb2495f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum device auto initialization period for LPDDR2, not relavant to DDR3.  <a href="#aa74ac795b9d382a99a614e843fb2495f">More...</a><br/></td></tr>
<tr class="separator:aa74ac795b9d382a99a614e843fb2495f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ace5207d01743acd016c7a8e16c20ade1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ace5207d01743acd016c7a8e16c20ade1"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ace5207d01743acd016c7a8e16c20ade1">tRTWSAME_Clocks</a></td></tr>
<tr class="memdesc:ace5207d01743acd016c7a8e16c20ade1"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">Read to write commands delay for same chip select, total delay is calculated
</pre><p> according to: BL/2 + RTW_SAME + (tCL-tCWL) + RALAT <br/></td></tr>
<tr class="separator:ace5207d01743acd016c7a8e16c20ade1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9497cbf8053421411b26e89b85d1709e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9497cbf8053421411b26e89b85d1709e"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a9497cbf8053421411b26e89b85d1709e">tWTRDIFF_Clocks</a></td></tr>
<tr class="memdesc:a9497cbf8053421411b26e89b85d1709e"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">Write to read commands delay for different chip select, total delay is calculated
</pre><p> according to: BL/2 + WTR_DIFF + (tCL-tCWL) + RALAT <br/></td></tr>
<tr class="separator:a9497cbf8053421411b26e89b85d1709e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1563c9107e70ac3767269114afd63ff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab1563c9107e70ac3767269114afd63ff"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab1563c9107e70ac3767269114afd63ff">tWTWDIFF_Clocks</a></td></tr>
<tr class="memdesc:ab1563c9107e70ac3767269114afd63ff"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">Write to write commands delay for different chip select, total delay is
</pre><p> calculated according to: BL/2 + WTW_DIFF <br/></td></tr>
<tr class="separator:ab1563c9107e70ac3767269114afd63ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae36371ba04dc8c2b3b0784b46a606de0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae36371ba04dc8c2b3b0784b46a606de0"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae36371ba04dc8c2b3b0784b46a606de0">tRTWDIFF_Clocks</a></td></tr>
<tr class="memdesc:ae36371ba04dc8c2b3b0784b46a606de0"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">Read to write commands delay for different chip select, total delay is calculated
</pre><p> according to: BL/2 + RTW_DIFF + (tCL - tCWL) + RALAT <br/></td></tr>
<tr class="separator:ae36371ba04dc8c2b3b0784b46a606de0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac04de5c11bcd04441a76a706c477d5d0"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ac04de5c11bcd04441a76a706c477d5d0">tRTRDIFF_Clocks</a></td></tr>
<tr class="memdesc:ac04de5c11bcd04441a76a706c477d5d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read to read commands delay for different chip select.  <a href="#ac04de5c11bcd04441a76a706c477d5d0">More...</a><br/></td></tr>
<tr class="separator:ac04de5c11bcd04441a76a706c477d5d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa399f43a3c70f7b4298961391fa94cbc"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aa399f43a3c70f7b4298961391fa94cbc">tXPDLL_Clocks</a></td></tr>
<tr class="memdesc:aa399f43a3c70f7b4298961391fa94cbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Exit precharge power down with DLL frozen to commands requiring DLL, not relavant to LPDDR2.  <a href="#aa399f43a3c70f7b4298961391fa94cbc">More...</a><br/></td></tr>
<tr class="separator:aa399f43a3c70f7b4298961391fa94cbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aac787ca0e70026598f3a2bb11f9105f2"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aac787ca0e70026598f3a2bb11f9105f2">tDLLK_Clocks</a></td></tr>
<tr class="memdesc:aac787ca0e70026598f3a2bb11f9105f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">DLL locking time, not relavant to LPDDR2.  <a href="#aac787ca0e70026598f3a2bb11f9105f2">More...</a><br/></td></tr>
<tr class="separator:aac787ca0e70026598f3a2bb11f9105f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2878d3038d017da68df86e2831a52388"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a2878d3038d017da68df86e2831a52388">tXPR_Clocks</a></td></tr>
<tr class="memdesc:a2878d3038d017da68df86e2831a52388"><td class="mdescLeft">&#160;</td><td class="mdescRight">CLKE High to a valid command, not relevant to LPDDR2.  <a href="#a2878d3038d017da68df86e2831a52388">More...</a><br/></td></tr>
<tr class="separator:a2878d3038d017da68df86e2831a52388"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a453fdd1f19700de5422b7f82a7d500a1"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a453fdd1f19700de5422b7f82a7d500a1">tSDEtoRST_Clocks</a></td></tr>
<tr class="memdesc:a453fdd1f19700de5422b7f82a7d500a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time from SDE enable until DDR #reset is high, not relavant to LPDDR2.  <a href="#a453fdd1f19700de5422b7f82a7d500a1">More...</a><br/></td></tr>
<tr class="separator:a453fdd1f19700de5422b7f82a7d500a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6b8a1d61f83ec755bf858da78c3aebc5"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a6b8a1d61f83ec755bf858da78c3aebc5">tAOFPD_Clocks</a></td></tr>
<tr class="memdesc:a6b8a1d61f83ec755bf858da78c3aebc5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Asynchronous RTT turn-off delay, not relavant to LPDDR2.  <a href="#a6b8a1d61f83ec755bf858da78c3aebc5">More...</a><br/></td></tr>
<tr class="separator:a6b8a1d61f83ec755bf858da78c3aebc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3f2fd202ea3e4e630dcc5f35a64748c6"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a3f2fd202ea3e4e630dcc5f35a64748c6">tAONPD_Clocks</a></td></tr>
<tr class="memdesc:a3f2fd202ea3e4e630dcc5f35a64748c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Asynchronous RTT turn-on delay, not relavant to LPDDR2.  <a href="#a3f2fd202ea3e4e630dcc5f35a64748c6">More...</a><br/></td></tr>
<tr class="separator:a3f2fd202ea3e4e630dcc5f35a64748c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab3664213a3dc5849c6440934f2417ab6"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab3664213a3dc5849c6440934f2417ab6">tODTIdleOff_Clocks</a></td></tr>
<tr class="memdesc:ab3664213a3dc5849c6440934f2417ab6"><td class="mdescLeft">&#160;</td><td class="mdescRight">ODT turn off latency, not relavant to LPDDR2.  <a href="#ab3664213a3dc5849c6440934f2417ab6">More...</a><br/></td></tr>
<tr class="separator:ab3664213a3dc5849c6440934f2417ab6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h4 class="groupheader">Field Documentation</h4>
<a class="anchor" id="aa74ac795b9d382a99a614e843fb2495f"></a>
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          <td class="memname">uint32_t mmdc_device_timing_t::tDAI_Clocks</td>
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      </table>
</div><div class="memdoc">

</div>
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          <td class="memname">uint8_t mmdc_device_timing_t::tRTRDIFF_Clocks</td>
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<p>total delay is calculated according to: BL/2 + RTR_DIFF </p>

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<a name="structmmdc__auto__refresh__t" id="structmmdc__auto__refresh__t"></a>
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          <td class="memname">struct mmdc_auto_refresh_t</td>
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<div class="textblock"></div><table class="memberdecls">
<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:ab9ea22f65b6a9da9f14f357b9b1bf154"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab9ea22f65b6a9da9f14f357b9b1bf154"></a>
uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab9ea22f65b6a9da9f14f357b9b1bf154">refreshCnt</a></td></tr>
<tr class="memdesc:ab9ea22f65b6a9da9f14f357b9b1bf154"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">define refresh counter which is how many DDR clock cycles arrive
</pre><p> will trigger auto refresh, only applied when choose refreshTrigSrc as kMMDC_RefreshTrigDDRCycles <br/></td></tr>
<tr class="separator:ab9ea22f65b6a9da9f14f357b9b1bf154"><td class="memSeparator" colspan="2">&#160;</td></tr>
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uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a6db1e8b45e54611713c6b12fc4c34a8d">refreshRate</a></td></tr>
<tr class="memdesc:a6db1e8b45e54611713c6b12fc4c34a8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">refresh rate-means how much cmd will send once auto refresh being trigger <br/></td></tr>
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<tr class="memitem:a46a531b5ddd549d77cd19528d9e9ba01"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a46a531b5ddd549d77cd19528d9e9ba01"></a>
<a class="el" href="group__mmdc.html#ga6083c5da4c6bd0ad9ec1592bf02e4183">mmdc_refresh_sel_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a46a531b5ddd549d77cd19528d9e9ba01">refreshTrigSrc</a></td></tr>
<tr class="memdesc:a46a531b5ddd549d77cd19528d9e9ba01"><td class="mdescLeft">&#160;</td><td class="mdescRight">select refresh trigger clock source <br/></td></tr>
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<a name="structmmdc__exaccess__config__t" id="structmmdc__exaccess__config__t"></a>
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          <td class="memname">struct mmdc_exaccess_config_t</td>
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<div class="textblock"></div><table class="memberdecls">
<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:abd880bfbdb322792308132c80aaab99a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="abd880bfbdb322792308132c80aaab99a"></a>
uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#abd880bfbdb322792308132c80aaab99a">excMonitorID0</a></td></tr>
<tr class="memdesc:abd880bfbdb322792308132c80aaab99a"><td class="mdescLeft">&#160;</td><td class="mdescRight">exclusive monitor ID 0 <br/></td></tr>
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uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a30f4672c8826dfa959b271df6fb2754d">excMonitorID1</a></td></tr>
<tr class="memdesc:a30f4672c8826dfa959b271df6fb2754d"><td class="mdescLeft">&#160;</td><td class="mdescRight">exclusive monitor ID 1 <br/></td></tr>
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uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a1e5cf5d1da3674177ef79bf6984692fe">excMonitorID2</a></td></tr>
<tr class="memdesc:a1e5cf5d1da3674177ef79bf6984692fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">exclusive monitor ID 2 <br/></td></tr>
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uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ac948cfb7f6b12690ac85ede08c07f936">excMonitorID3</a></td></tr>
<tr class="memdesc:ac948cfb7f6b12690ac85ede08c07f936"><td class="mdescLeft">&#160;</td><td class="mdescRight">exclusive monitor ID 3 <br/></td></tr>
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bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aac0ed8a193296833663c667692c8c370">secErrLock</a></td></tr>
<tr class="memdesc:aac0ed8a193296833663c667692c8c370"><td class="mdescLeft">&#160;</td><td class="mdescRight">define if lock ARCR_SEC_ERR_EN this bit can't update if locked <br/></td></tr>
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<tr class="memitem:a801df093f555a631a438692f435a27b6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a801df093f555a631a438692f435a27b6"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a801df093f555a631a438692f435a27b6">secErrEn</a></td></tr>
<tr class="memdesc:a801df093f555a631a438692f435a27b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This bit defines whether security read/write access violation result in SLV Error response or in OKAY response. <br/></td></tr>
<tr class="separator:a801df093f555a631a438692f435a27b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abaef5a867142747ec56dffe68bdc98f0"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#abaef5a867142747ec56dffe68bdc98f0">excErrEn</a></td></tr>
<tr class="memdesc:abaef5a867142747ec56dffe68bdc98f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This bit defines whether exclusive read/write access violation of AXI 6.2.4 rule result in SLV Error response or in OKAY response .  <a href="#abaef5a867142747ec56dffe68bdc98f0">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
<a class="anchor" id="abaef5a867142747ec56dffe68bdc98f0"></a>
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<p>Default value is 0x1 response is SLV Error </p>

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<a name="structmmdc__profiling__config__t" id="structmmdc__profiling__config__t"></a>
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          <td class="memname">struct mmdc_profiling_config_t</td>
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<div class="textblock"></div><table class="memberdecls">
<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:ae2edf11852571e753b2155a1b6103d83"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae2edf11852571e753b2155a1b6103d83"></a>
<a class="el" href="group__mmdc.html#ga4fa123a8c90bdb4f7c98cb190344fc56">mmdc_profiling_action_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae2edf11852571e753b2155a1b6103d83">type</a></td></tr>
<tr class="memdesc:ae2edf11852571e753b2155a1b6103d83"><td class="mdescLeft">&#160;</td><td class="mdescRight">profiling action <br/></td></tr>
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bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#adbe36137cccc81e52b85be24505f22ad">overFlowCount</a></td></tr>
<tr class="memdesc:adbe36137cccc81e52b85be24505f22ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">profiling cycle counter over flag <br/></td></tr>
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uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae3dc68338b30798c6725da9b7a8bfe4f">axiIDMask</a></td></tr>
<tr class="memdesc:ae3dc68338b30798c6725da9b7a8bfe4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">profiling AXI ID mask <br/></td></tr>
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<tr class="memitem:aa77c8cd1647ed4007820d9a16d6f9a86"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aa77c8cd1647ed4007820d9a16d6f9a86"></a>
uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aa77c8cd1647ed4007820d9a16d6f9a86">axiID</a></td></tr>
<tr class="memdesc:aa77c8cd1647ed4007820d9a16d6f9a86"><td class="mdescLeft">&#160;</td><td class="mdescRight">profiling AXI ID <br/></td></tr>
<tr class="separator:aa77c8cd1647ed4007820d9a16d6f9a86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a902c125496bbd3e52ef42be19a798fd5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a902c125496bbd3e52ef42be19a798fd5"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a902c125496bbd3e52ef42be19a798fd5">totalCount</a></td></tr>
<tr class="memdesc:a902c125496bbd3e52ef42be19a798fd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">total cycle count-readonly <br/></td></tr>
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<tr class="memitem:ab711172cc0e92f441dad9186bd3a93a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab711172cc0e92f441dad9186bd3a93a5"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab711172cc0e92f441dad9186bd3a93a5">busyCount</a></td></tr>
<tr class="memdesc:ab711172cc0e92f441dad9186bd3a93a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">busy count-readonly <br/></td></tr>
<tr class="separator:ab711172cc0e92f441dad9186bd3a93a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adeda1286a1cbff0bd519ccd44f94a25d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="adeda1286a1cbff0bd519ccd44f94a25d"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#adeda1286a1cbff0bd519ccd44f94a25d">readCount</a></td></tr>
<tr class="memdesc:adeda1286a1cbff0bd519ccd44f94a25d"><td class="mdescLeft">&#160;</td><td class="mdescRight">total read count-readonly <br/></td></tr>
<tr class="separator:adeda1286a1cbff0bd519ccd44f94a25d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af1de6e3a61379f26df2fcda8113c0ad0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af1de6e3a61379f26df2fcda8113c0ad0"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#af1de6e3a61379f26df2fcda8113c0ad0">writeCount</a></td></tr>
<tr class="memdesc:af1de6e3a61379f26df2fcda8113c0ad0"><td class="mdescLeft">&#160;</td><td class="mdescRight">total write count-readonly <br/></td></tr>
<tr class="separator:af1de6e3a61379f26df2fcda8113c0ad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a39cd5d65e8a8b16f4288df405fc15fc4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a39cd5d65e8a8b16f4288df405fc15fc4"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a39cd5d65e8a8b16f4288df405fc15fc4">readByteCount</a></td></tr>
<tr class="memdesc:a39cd5d65e8a8b16f4288df405fc15fc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">read byte count-readonly <br/></td></tr>
<tr class="separator:a39cd5d65e8a8b16f4288df405fc15fc4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad9232cff8e54fdbfaf00c1c6e3804389"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad9232cff8e54fdbfaf00c1c6e3804389"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad9232cff8e54fdbfaf00c1c6e3804389">writeByteCount</a></td></tr>
<tr class="memdesc:ad9232cff8e54fdbfaf00c1c6e3804389"><td class="mdescLeft">&#160;</td><td class="mdescRight">total write byte count-readonly <br/></td></tr>
<tr class="separator:ad9232cff8e54fdbfaf00c1c6e3804389"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<a name="structmmdc__performance__config__t" id="structmmdc__performance__config__t"></a>
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          <td class="memname">struct mmdc_performance_config_t</td>
        </tr>
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<div class="textblock"></div><table class="memberdecls">
<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:a4a6c925589b656112e98e93320058998"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4a6c925589b656112e98e93320058998"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4a6c925589b656112e98e93320058998">enRCH</a></td></tr>
<tr class="memdesc:a4a6c925589b656112e98e93320058998"><td class="mdescLeft">&#160;</td><td class="mdescRight">define if enable real time channel in MAARCR <br/></td></tr>
<tr class="separator:a4a6c925589b656112e98e93320058998"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4446da4d70f32eae2c6299332e363e6a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4446da4d70f32eae2c6299332e363e6a"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4446da4d70f32eae2c6299332e363e6a">ratePageHit</a></td></tr>
<tr class="memdesc:a4446da4d70f32eae2c6299332e363e6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">static score taken into account in case the pending access has a page hit in MAARCR <br/></td></tr>
<tr class="separator:a4446da4d70f32eae2c6299332e363e6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a435f9417a56a3e7f3ae03092be6b7343"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a435f9417a56a3e7f3ae03092be6b7343"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a435f9417a56a3e7f3ae03092be6b7343">rateAccessHit</a></td></tr>
<tr class="memdesc:a435f9417a56a3e7f3ae03092be6b7343"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">static score taken into account in case the pending access
</pre><p> is same as before in MAARCR <br/></td></tr>
<tr class="separator:a435f9417a56a3e7f3ae03092be6b7343"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abb83cb63b3d3fd91b1109f087b7847ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="abb83cb63b3d3fd91b1109f087b7847ce"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#abb83cb63b3d3fd91b1109f087b7847ce">dynJump</a></td></tr>
<tr class="memdesc:abb83cb63b3d3fd91b1109f087b7847ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">dynamic score give to any pending access in case it was not chosen in arbitration in MAARCR <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a846eaca1244a63aa6a80bb57b724714e">dynMax</a></td></tr>
<tr class="memdesc:a846eaca1244a63aa6a80bb57b724714e"><td class="mdescLeft">&#160;</td><td class="mdescRight">dynamic score max value in MAARCR <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a338e40bd15e5e74e9aaab4d0661ac57a">guard</a></td></tr>
<tr class="memdesc:a338e40bd15e5e74e9aaab4d0661ac57a"><td class="mdescLeft">&#160;</td><td class="mdescRight">use to prevent a starvation of access <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a010b35b582f70806011bc9699d563c84">cmdPredict</a></td></tr>
<tr class="memdesc:a010b35b582f70806011bc9699d563c84"><td class="mdescLeft">&#160;</td><td class="mdescRight">define cmd prediction work mode in misc <br/></td></tr>
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<a name="structmmdc__device__config__t" id="structmmdc__device__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:a4d2187c8778217b166172de6fcfd694d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4d2187c8778217b166172de6fcfd694d"></a>
<a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4d2187c8778217b166172de6fcfd694d">devType</a></td></tr>
<tr class="memdesc:a4d2187c8778217b166172de6fcfd694d"><td class="mdescLeft">&#160;</td><td class="mdescRight">define device type <br/></td></tr>
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<tr class="memitem:a3fe52d1acde7f9922b601987be5c0f5f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a3fe52d1acde7f9922b601987be5c0f5f"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a3fe52d1acde7f9922b601987be5c0f5f">devSize</a></td></tr>
<tr class="memdesc:a3fe52d1acde7f9922b601987be5c0f5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">define the size of the device <br/></td></tr>
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<tr class="memitem:aef3d907424f6eba9b66f6f7061deaec4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aef3d907424f6eba9b66f6f7061deaec4"></a>
<a class="el" href="group__mmdc.html#ga8cfdf8e7aa5a153cfc8c36f5f801a803">mmdc_device_bank_num_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#aef3d907424f6eba9b66f6f7061deaec4">devBank</a></td></tr>
<tr class="memdesc:aef3d907424f6eba9b66f6f7061deaec4"><td class="mdescLeft">&#160;</td><td class="mdescRight">define device total bank number <br/></td></tr>
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<tr class="memitem:a9e00c5e66573c119a1b8880ffb0d0b88"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9e00c5e66573c119a1b8880ffb0d0b88"></a>
<a class="el" href="group__mmdc.html#gaee6009cc074c85e545787c20e694b340">mmdc_row_addr_width_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a9e00c5e66573c119a1b8880ffb0d0b88">rowWidth</a></td></tr>
<tr class="memdesc:a9e00c5e66573c119a1b8880ffb0d0b88"><td class="mdescLeft">&#160;</td><td class="mdescRight">define row width in MDCTL <br/></td></tr>
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<a class="el" href="group__mmdc.html#gaddc758eb4bd3d4a9394a4caad314670a">mmdc_col_addr_width_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a8762ae8f7686008cb55fc36fbfb17999">colWidth</a></td></tr>
<tr class="memdesc:a8762ae8f7686008cb55fc36fbfb17999"><td class="mdescLeft">&#160;</td><td class="mdescRight">define col width in MDCTL <br/></td></tr>
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<a class="el" href="group__mmdc.html#ga299ae477876b1965ed54c4f3d8617b8d">mmdc_burst_len_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ae6bd45e48393a3eeaef64303b2bc47d3">burstLen</a></td></tr>
<tr class="memdesc:ae6bd45e48393a3eeaef64303b2bc47d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">define burst length MDCTL <br/></td></tr>
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bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad629b3ce317b60b03a2cd22ea569f3b6">bankInterleave</a></td></tr>
<tr class="memdesc:ad629b3ce317b60b03a2cd22ea569f3b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">define indicate bank interleave on/off in misc <br/></td></tr>
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bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a81ec5b187d966f8505658c744e49d641">secondDDRClock</a></td></tr>
<tr class="memdesc:a81ec5b187d966f8505658c744e49d641"><td class="mdescLeft">&#160;</td><td class="mdescRight">define gating the secondary DDR clock in misc <br/></td></tr>
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<tr class="memitem:a182f02743cf1b52dba96ff07a3038b14"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a182f02743cf1b52dba96ff07a3038b14"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a182f02743cf1b52dba96ff07a3038b14">enableOnlyCS0</a></td></tr>
<tr class="memdesc:a182f02743cf1b52dba96ff07a3038b14"><td class="mdescLeft">&#160;</td><td class="mdescRight">Only enable CS0. <br/></td></tr>
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<tr class="memitem:a3152cb8324888fc937b563ed5d70c4ec"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__odt__config__t">mmdc_odt_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a3152cb8324888fc937b563ed5d70c4ec">ODTConfig</a></td></tr>
<tr class="memdesc:a3152cb8324888fc937b563ed5d70c4ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to on die termination config, NULL means disable, for LPDDR2, pass NULL.  <a href="#a3152cb8324888fc937b563ed5d70c4ec">More...</a><br/></td></tr>
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<tr class="memitem:a778db8320ef2c06580b3a4c8b9fcec12"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__zq__config__t">mmdc_zq_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a778db8320ef2c06580b3a4c8b9fcec12">zqCalibration</a></td></tr>
<tr class="memdesc:a778db8320ef2c06580b3a4c8b9fcec12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to device timing structure.  <a href="#a778db8320ef2c06580b3a4c8b9fcec12">More...</a><br/></td></tr>
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<tr class="memitem:a0dd68afeaa0cea68e7d61e9840acf7ac"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__device__config__t">mmdc_device_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a0dd68afeaa0cea68e7d61e9840acf7ac">deviceConfig</a> [2]</td></tr>
<tr class="memdesc:a0dd68afeaa0cea68e7d61e9840acf7ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to ZQ calibration config, NULL means do not need.  <a href="#a0dd68afeaa0cea68e7d61e9840acf7ac">More...</a><br/></td></tr>
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<tr class="memitem:ab883cf580c2429eb5bbd944d1ebb83d8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__readDQS__calibration__config__t">mmdc_readDQS_calibration_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ab883cf580c2429eb5bbd944d1ebb83d8">readDQSCalibration</a> [2]</td></tr>
<tr class="memdesc:ab883cf580c2429eb5bbd944d1ebb83d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to device configuration CS0/CS1, NULL means do not need.  <a href="#ab883cf580c2429eb5bbd944d1ebb83d8">More...</a><br/></td></tr>
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<tr class="memitem:ac5f4fa11026c9b6330b7ceda81d8404f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__writeLeveling__calibration__config__t">mmdc_writeLeveling_calibration_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ac5f4fa11026c9b6330b7ceda81d8404f">wLevelingCalibration</a> [2]</td></tr>
<tr class="memdesc:ac5f4fa11026c9b6330b7ceda81d8404f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to read DQS calibration config CS0/CS1, NULL meansdo not need, for LPDDR2, pass NULL.  <a href="#ac5f4fa11026c9b6330b7ceda81d8404f">More...</a><br/></td></tr>
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<tr class="memitem:ad2257eb5949abf63409d6d7533d7b214"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__read__calibration__config__t">mmdc_read_calibration_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#ad2257eb5949abf63409d6d7533d7b214">readCalibration</a> [2]</td></tr>
<tr class="memdesc:ad2257eb5949abf63409d6d7533d7b214"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to write leveling calibration config, NULL means do not need, for LPDDR2, pass NULL.  <a href="#ad2257eb5949abf63409d6d7533d7b214">More...</a><br/></td></tr>
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<tr class="memitem:a4e17185f34191766243648dcc3df35fa"><td class="memItemLeft" align="right" valign="top">mmdc_write_calibration_config_t *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a4e17185f34191766243648dcc3df35fa">writeCalibration</a> [2]</td></tr>
<tr class="memdesc:a4e17185f34191766243648dcc3df35fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to read calibration config CS0/CS1, NULL means do not need.  <a href="#a4e17185f34191766243648dcc3df35fa">More...</a><br/></td></tr>
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<tr class="memitem:a5a330d64c3a2472a21667e66db81b13c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__fine__tuning__config__t">mmdc_fine_tuning_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a5a330d64c3a2472a21667e66db81b13c">tuning</a></td></tr>
<tr class="memdesc:a5a330d64c3a2472a21667e66db81b13c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to write calibration config CS0/CS1, NULL means do not need.  <a href="#a5a330d64c3a2472a21667e66db81b13c">More...</a><br/></td></tr>
<tr class="separator:a5a330d64c3a2472a21667e66db81b13c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3b21f67e890e96d7aa988ebd075be7ec"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a3b21f67e890e96d7aa988ebd075be7ec">autoRefresh</a></td></tr>
<tr class="memdesc:a3b21f67e890e96d7aa988ebd075be7ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to fine tuning config, NULL means do not need.  <a href="#a3b21f67e890e96d7aa988ebd075be7ec">More...</a><br/></td></tr>
<tr class="separator:a3b21f67e890e96d7aa988ebd075be7ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a19042dd22c702de0d7bc237b7e8a65b2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__mmdc.html#structmmdc__power__config__t">mmdc_power_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmdc.html#a19042dd22c702de0d7bc237b7e8a65b2">powerConfig</a></td></tr>
<tr class="memdesc:a19042dd22c702de0d7bc237b7e8a65b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to auto refresh config structure, NULL means do not need.  <a href="#a19042dd22c702de0d7bc237b7e8a65b2">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__odt__config__t">mmdc_odt_config_t</a>* mmdc_config_t::ODTConfig</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__zq__config__t">mmdc_zq_config_t</a>* mmdc_config_t::zqCalibration</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__device__config__t">mmdc_device_config_t</a>* mmdc_config_t::deviceConfig[2]</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__readDQS__calibration__config__t">mmdc_readDQS_calibration_config_t</a>* mmdc_config_t::readDQSCalibration[2]</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__writeLeveling__calibration__config__t">mmdc_writeLeveling_calibration_config_t</a>* mmdc_config_t::wLevelingCalibration[2]</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__read__calibration__config__t">mmdc_read_calibration_config_t</a>* mmdc_config_t::readCalibration[2]</td>
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          <td class="memname">mmdc_write_calibration_config_t* mmdc_config_t::writeCalibration[2]</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__fine__tuning__config__t">mmdc_fine_tuning_config_t</a>* mmdc_config_t::tuning</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a>* mmdc_config_t::autoRefresh</td>
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          <td class="memname"><a class="el" href="group__mmdc.html#structmmdc__power__config__t">mmdc_power_config_t</a>* mmdc_config_t::powerConfig</td>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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          <td class="memname">#define MMDC_READ_DQS_FINE_TUNING_MASK&#160;&#160;&#160;(0x77777777U)</td>
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<p>define the read DQS fine tuning mask value </p>

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          <td class="memname">#define MMDC_WRITE_DQS_FINE_TUNING_MASK&#160;&#160;&#160;(0xF3333333U)</td>
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<p>define the write DQS fine tuning mask value </p>

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          <td class="memname">#define MMDC_PRE_DEFINE_VALUE_DEFAULT&#160;&#160;&#160;(0xCCU)</td>
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<p>define the calibration predefine value </p>

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          <td class="memname">#define MMDC_MEASUREUNIT_ERR_FREQ&#160;&#160;&#160;(100000000U)</td>
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<p>according to ERR005778 description </p>

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<h2 class="groupheader">Typedef Documentation</h2>
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          <td class="memname">typedef void(* MMDC_SwitchFrequency)(MMDC_Type *, void *, void *, uint32_t)</td>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga0f1ea8b47734a51a44c97157f3fe80cb">_mmdc_status</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga0f1ea8b47734a51a44c97157f3fe80cba77d5457552dd53f0b98349dfc0527cef"></a>kStatus_MMDC_ErrorDGCalibration</em>&nbsp;</td><td class="fielddoc">
<p>MMDC error DG calibration. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga0f1ea8b47734a51a44c97157f3fe80cba27aa6b41e2ca49fb84a279cb8c75d180"></a>kStatus_MMDC_ErrorReadCalibration</em>&nbsp;</td><td class="fielddoc">
<p>MMDC error read calibration. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga0f1ea8b47734a51a44c97157f3fe80cba6260860c647d047bbdfdc93b854450fb"></a>kStatus_MMDC_ErrorWriteCalibration</em>&nbsp;</td><td class="fielddoc">
<p>MMDC error write calibration. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga0f1ea8b47734a51a44c97157f3fe80cba633dc728d88021c2ec74a882c3926e52"></a>kStatus_MMDC_ErrorWriteLevelingCalibration</em>&nbsp;</td><td class="fielddoc">
<p>MMDC error write leveling calibration. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga0f1ea8b47734a51a44c97157f3fe80cbae696011188cbfdfceff1a64f4b4c3522"></a>kStatus_MMDC_WaitFlagTimeout</em>&nbsp;</td><td class="fielddoc">
<p>MMDC wait flag timeout. </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggab210b492af2dae23c0dc82f9b7ad3339adaef93147ac1e04b29c516efc96b1d05"></a>kMMDC_LPDDR2_S4</em>&nbsp;</td><td class="fielddoc">
<p>LPDDR2-S4. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggab210b492af2dae23c0dc82f9b7ad3339ad2007a5624e14ba574a891051b2069c2"></a>kMMDC_LPDDR2_S2</em>&nbsp;</td><td class="fielddoc">
<p>LPDDR2-S2. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggab210b492af2dae23c0dc82f9b7ad3339a8d12adce93de01e486586a7b66e952c8"></a>kMMDC_DDR3</em>&nbsp;</td><td class="fielddoc">
<p>DDR3 device. </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga8cfdf8e7aa5a153cfc8c36f5f801a803">mmdc_device_bank_num_t</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga8cfdf8e7aa5a153cfc8c36f5f801a803ae47ae788ad0f91239a10f4a1479648ea"></a>kMMDC_Bank8</em>&nbsp;</td><td class="fielddoc">
<p>bank number 8 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga8cfdf8e7aa5a153cfc8c36f5f801a803a9640310be9c5977c6800d045e1862f84"></a>kMMDC_Bank4</em>&nbsp;</td><td class="fielddoc">
<p>bank number 4 </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#gaee6009cc074c85e545787c20e694b340">mmdc_row_addr_width_t</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaee6009cc074c85e545787c20e694b340a5462768c0e58133b6b87e39e80422473"></a>kMMDC_Row11Bits</em>&nbsp;</td><td class="fielddoc">
<p>row addr 11 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaee6009cc074c85e545787c20e694b340ad6fb8eae91e6daf828a642274b02fea7"></a>kMMDC_Row12Bits</em>&nbsp;</td><td class="fielddoc">
<p>row addr 12 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaee6009cc074c85e545787c20e694b340a9ff76ef8b787391ec87540b7b9fbc88d"></a>kMMDC_Row13Bits</em>&nbsp;</td><td class="fielddoc">
<p>row addr 13 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaee6009cc074c85e545787c20e694b340ad431af5709cb227e0376fe3e32f76643"></a>kMMDC_Row14Bits</em>&nbsp;</td><td class="fielddoc">
<p>row addr 14 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaee6009cc074c85e545787c20e694b340aba1e19d09fba051ecba6db3c0ff91e80"></a>kMMDC_Row15Bits</em>&nbsp;</td><td class="fielddoc">
<p>row addr 15 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaee6009cc074c85e545787c20e694b340aef9c1a4da07175f5529972e84dfa43f6"></a>kMMDC_Row16Bits</em>&nbsp;</td><td class="fielddoc">
<p>row addr 16 bits </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#gaddc758eb4bd3d4a9394a4caad314670a">mmdc_col_addr_width_t</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaddc758eb4bd3d4a9394a4caad314670aa6229d81c9914f4729cf1caa597c3c193"></a>kMMDC_Col9Bits</em>&nbsp;</td><td class="fielddoc">
<p>col addr 9 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddc758eb4bd3d4a9394a4caad314670aa32151b1933c5c94ebd130ff5260693b8"></a>kMMDC_Col10Bits</em>&nbsp;</td><td class="fielddoc">
<p>col addr 10 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddc758eb4bd3d4a9394a4caad314670aace7c35d8dbcfb308f740b71167c28aaa"></a>kMMDC_Col11Bits</em>&nbsp;</td><td class="fielddoc">
<p>col addr 11 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddc758eb4bd3d4a9394a4caad314670aa19a8a79fd6b1e62601effb7dec217b4d"></a>kMMDC_Col8Bits</em>&nbsp;</td><td class="fielddoc">
<p>col addr 8 bits </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddc758eb4bd3d4a9394a4caad314670aaebc275a52be7f232e2496c4324848622"></a>kMMDC_Col12Bits</em>&nbsp;</td><td class="fielddoc">
<p>col addr 12 bits </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga299ae477876b1965ed54c4f3d8617b8d">mmdc_burst_len_t</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga299ae477876b1965ed54c4f3d8617b8da201bef8a155157694810dab596e9f0f1"></a>kMMDC_BurstLen4</em>&nbsp;</td><td class="fielddoc">
<p>brust len 4 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga299ae477876b1965ed54c4f3d8617b8daa5f4d6e1e9f2cc91498115b52c53494d"></a>kMMDC_BurstLen8</em>&nbsp;</td><td class="fielddoc">
<p>burst len 8 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga299ae477876b1965ed54c4f3d8617b8dafa709873e51e85c04c77ea163b7a5d25"></a>kMMDC_BurstLen16</em>&nbsp;</td><td class="fielddoc">
<p>reserved </p>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#gaddb10c3c6cddcf3cb846cdc171fc127e">mmdc_cmd_type_t</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaddb10c3c6cddcf3cb846cdc171fc127ea39a5da0c04e765dc95497bbe4ccd618f"></a>kMMDC_NormalOperation</em>&nbsp;</td><td class="fielddoc">
<p>normal operation cmd </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddb10c3c6cddcf3cb846cdc171fc127ea5d6c2c0d1f5486e3e2d0e8f852735290"></a>kMMDC_AutoRefresh</em>&nbsp;</td><td class="fielddoc">
<p>auto refresh cmd </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddb10c3c6cddcf3cb846cdc171fc127ea8bba4acac2caf2f6d10e475145cf25c3"></a>kMMDC_WriteModeRegister</em>&nbsp;</td><td class="fielddoc">
<p>load mode register for DDR2/DDR3,MRW for LPDDR2 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddb10c3c6cddcf3cb846cdc171fc127ea613fac9dc69b5e209be3cab9bf3acc00"></a>kMMDC_ZQCalibration</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration cmd. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddb10c3c6cddcf3cb846cdc171fc127ea86ed07e7879e14674ad589bc29f5b444"></a>kMMDC_PreChargeAll</em>&nbsp;</td><td class="fielddoc">
<p>Precharge all cmd. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaddb10c3c6cddcf3cb846cdc171fc127eaa39205d913f899b6fef8b6834a41d82a"></a>kMMDC_ReadModeRegister</em>&nbsp;</td><td class="fielddoc">
<p>mode register read cmd </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#gad35261414c9c921bc08b8ffcddf817ff">mmdc_zq_calmode_t</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggad35261414c9c921bc08b8ffcddf817ffa85128306e31eec13f8a72ffba33f46fc"></a>kMMDC_ZQCaltoIOHW</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration to IO pads only through HW. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad35261414c9c921bc08b8ffcddf817ffaf64229de230434590619fd189a18c985"></a>kMMDC_ZQCaltoIODeviceLong</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration to IO pads together with ZQ long cmd to device. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad35261414c9c921bc08b8ffcddf817ffaf46199e708dbff37b3f1cb0c6577cd72"></a>kMMDC_ZQCaltoDeviceOnly</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration to device with long/short cmd. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad35261414c9c921bc08b8ffcddf817ffa1c5c3eea04f4c3d43d9491f83a6a70e3"></a>kMMDC_ZQCaltoIODeviceLongShort</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration to IO pads together with ZQ calibration cmd long/short to device. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad35261414c9c921bc08b8ffcddf817ffa31cad4951d9e99c6643aaef52fc9b1d1"></a>kMMDC_ZQFinetuning</em>&nbsp;</td><td class="fielddoc">
<p>HW ZQ res offset fine tuning. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad35261414c9c921bc08b8ffcddf817ffac8bc273fb7776aefd818eb60c13e99d8"></a>kMMDC_DisZQFinetuning</em>&nbsp;</td><td class="fielddoc">
<p>disable HW ZQ res offset </p>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga468f46beeb78ef3cf23b392243a3cbea">mmdc_zq_calfreq_t</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga468f46beeb78ef3cf23b392243a3cbeaaad9dce3c6126cb10cd753958dcba79b3"></a>kMMDC_ZQCalFreq1ms</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration is peformed every 1ms. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga468f46beeb78ef3cf23b392243a3cbeaa97f099bf0ca8c3d8e3ce9340835aa3de"></a>kMMDC_ZQCalFreq2ms</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration is peformed every 2ms. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga468f46beeb78ef3cf23b392243a3cbeaaff52b67a7f674eae561eb196f5280064"></a>kMMDC_ZQCalFreq4ms</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration is peformed every 4ms. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga468f46beeb78ef3cf23b392243a3cbeaa7dfaf191c5c4d57b5edd5f245e6dc77a"></a>kMMDC_ZQCalFreq1s</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration is peformed every 1s. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga468f46beeb78ef3cf23b392243a3cbeaa5719b0a3394a8e9f4c445849226d670d"></a>kMMDC_ZQCalFreq16s</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration is peformed every 16s. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga468f46beeb78ef3cf23b392243a3cbeaa99ed509d6b7bb48b4a15260ec85acaee"></a>kMMDC_ZQCalFreq32s</em>&nbsp;</td><td class="fielddoc">
<p>ZQ calibration is peformed every 32s. </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga6083c5da4c6bd0ad9ec1592bf02e4183">mmdc_refresh_sel_t</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga6083c5da4c6bd0ad9ec1592bf02e4183a6d138a71319d150d8eb2f2d2a589b5cc"></a>kMMDC_RefreshTrigBy64K</em>&nbsp;</td><td class="fielddoc">
<p>refresh trigger frequency 64K </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga6083c5da4c6bd0ad9ec1592bf02e4183a9b4943b6364459ef3b428ab597cf87c7"></a>kMMDC_RefreshTrigBy32K</em>&nbsp;</td><td class="fielddoc">
<p>refresh trigger frequency 32K </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga6083c5da4c6bd0ad9ec1592bf02e4183acce14eb57b6f7b26d58a0752dc8bbc31"></a>kMMDC_RefreshTrigDDRCycles</em>&nbsp;</td><td class="fielddoc">
<p>refresh trigger every amount of cycles that are configured in REF_CNT field </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga6083c5da4c6bd0ad9ec1592bf02e4183a8fa4645c19bb08dbd79b0236395af5f8"></a>kMMDC_RefreshTrigNone</em>&nbsp;</td><td class="fielddoc">
<p>auto refresh disable </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga4fa123a8c90bdb4f7c98cb190344fc56">mmdc_profiling_action_t</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga4fa123a8c90bdb4f7c98cb190344fc56a123acc17a03be52c0f35ad792c28a07a"></a>kMMDC_EnProfilingWithID</em>&nbsp;</td><td class="fielddoc">
<p>enable profiling with special ID </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4fa123a8c90bdb4f7c98cb190344fc56ae7dfe55d812cd51a62b40bd2b3315c72"></a>kMMDC_FreezeProfiling</em>&nbsp;</td><td class="fielddoc">
<p>freeze profiling </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4fa123a8c90bdb4f7c98cb190344fc56adbcab923f0539ad0bb23cf15248e87c6"></a>kMMDC_CheckOverFlow</em>&nbsp;</td><td class="fielddoc">
<p>check the counter overflow </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga947cb9e89a390cfc0fcce314f8dafdde"></a>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga947cb9e89a390cfc0fcce314f8dafdde">mmdc_calibration_type_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga947cb9e89a390cfc0fcce314f8dafddea90dacb54a2d7a72e3ac75297d076ea35"></a>kMMDC_CalWithPreSetValue</em>&nbsp;</td><td class="fielddoc">
<p>calibration with preset value </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga947cb9e89a390cfc0fcce314f8dafddeaf94f50c9c2c1f910ecad5ee3c1cb19b9"></a>kMMDC_CalWithMPR</em>&nbsp;</td><td class="fielddoc">
<p>HW calibration with the MPR. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga947cb9e89a390cfc0fcce314f8dafddeadf2096187abe015c1814e6aab917e73e"></a>kMMDC_CalWithPreDefine</em>&nbsp;</td><td class="fielddoc">
<p>calibration with Pre-defined value </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="gaa5c17a9bcd8ce97a1fcc27c61d672266"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__mmdc.html#gaa5c17a9bcd8ce97a1fcc27c61d672266">mmdc_calibaration_waitcycles_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaa5c17a9bcd8ce97a1fcc27c61d672266af36b9db11d7ca4fccb8c85f51e13f7cc"></a>kMMDC_Wait16DDRCycles</em>&nbsp;</td><td class="fielddoc">
<p>wait 16 DDR cycles before comparing sample data </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa5c17a9bcd8ce97a1fcc27c61d672266ab5235b46ac30fbbef5aa1629bffced79"></a>kMMDC_Wait32DDRCycles</em>&nbsp;</td><td class="fielddoc">
<p>wait 32 DDR cycles before comparing sample data </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga6d4b7ce78c060bb39b54cede59a7eebf"></a>
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        <tr>
          <td class="memname">enum <a class="el" href="group__mmdc.html#ga6d4b7ce78c060bb39b54cede59a7eebf">mmdc_fine_tuning_dutycycle_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga6d4b7ce78c060bb39b54cede59a7eebfaba47df8b4336aae312db7e1857c283bb"></a>kMMDC_DutyHighPercent48_5</em>&nbsp;</td><td class="fielddoc">
<p>51.5% low 48.5% high </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga6d4b7ce78c060bb39b54cede59a7eebfa4d7788b8f1cd83adf76ae2e2deb82152"></a>kMMDC_DutyHighPercent50</em>&nbsp;</td><td class="fielddoc">
<p>50% duty cycle </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga6d4b7ce78c060bb39b54cede59a7eebfa8453b93e14a5aa4c713fe99c6ca98bbb"></a>kMMDC_DutyHighPercent51_5</em>&nbsp;</td><td class="fielddoc">
<p>48.5% low 51.5% high </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga529bd493eff7d988996fd9a2adb60702"></a>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga529bd493eff7d988996fd9a2adb60702">mmdc_termination_config_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702a68667a19b663483fc8e4fbbdbb8de200"></a>kMMDC_RttNomDisabled</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom Disabled. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702a6fda4277a087d23aa397af235b9542ab"></a>kMMDC_RttNom120ohm</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom 120 Ohm. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702a36691d8a9859ed4af1d7d0468b738c0f"></a>kMMDC_RttNom60ohm</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom 60 Ohm. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702a1ddd8dc9bc7f849306db0d768abc6bea"></a>kMMDC_RttNom40ohm</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom 40 Ohm. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702af6f21c8441c823dbc6350e4a81dc6b04"></a>kMMDC_RttNom30ohm</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom 30 Ohm. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702a72003620557510f4ae3168a81b869ce8"></a>kMMDC_RttNom24ohm</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom 24 Ohm. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702a255eb6781296999e1e7e01537b187b92"></a>kMMDC_RttNom20ohm</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom 20 Ohm. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga529bd493eff7d988996fd9a2adb60702a344d3f3f6393b6ebf7253a769a223265"></a>kMMDC_RttNom17ohm</em>&nbsp;</td><td class="fielddoc">
<p>Rtt_Nom 17 Ohm. </p>
</td></tr>
</table>

</div>
</div>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#ga23cec43724936b9388802c21e8fa08c4">_mmdc_lpddr2_derate</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga23cec43724936b9388802c21e8fa08c4ad533ead96774a60e7c897ca47070cd2b"></a>kMMDC_NoUpdateDerate</em>&nbsp;</td><td class="fielddoc">
<p>no derate </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga23cec43724936b9388802c21e8fa08c4a35e7304955dc0243ae08727633784bc8"></a>kMMDC_UpdateRefreshRate</em>&nbsp;</td><td class="fielddoc">
<p>refresh rate derate </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga23cec43724936b9388802c21e8fa08c4a35bdc3c7cc1e6709972eff3b7063923a"></a>kMMDC_DerateTiming</em>&nbsp;</td><td class="fielddoc">
<p>derating relate timing </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="gab979c4ca4f7ecf02e19ff0eb1945a7b3"></a>
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          <td class="memname">enum <a class="el" href="group__mmdc.html#gab979c4ca4f7ecf02e19ff0eb1945a7b3">_mmdc_exaccess_type</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggab979c4ca4f7ecf02e19ff0eb1945a7b3a0d12e7538ff6f8c3a4df088ff58c31e9"></a>kMMDC_ExMonitorID0</em>&nbsp;</td><td class="fielddoc">
<p>config the exclusive access ID0 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggab979c4ca4f7ecf02e19ff0eb1945a7b3aa726a3a7ed33477e1375f6dcc89fc908"></a>kMMDC_ExMonitorID1</em>&nbsp;</td><td class="fielddoc">
<p>config the exclusive access ID1 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggab979c4ca4f7ecf02e19ff0eb1945a7b3a471e09c8e38c8dab5a6cccfc88d4d657"></a>kMMDC_ExMonitorID2</em>&nbsp;</td><td class="fielddoc">
<p>config the exclusive access ID2 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggab979c4ca4f7ecf02e19ff0eb1945a7b3acf8a62170d4506198db2d3cfec81382e"></a>kMMDC_ExMonitorID3</em>&nbsp;</td><td class="fielddoc">
<p>config the exclusive access ID3 </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggab979c4ca4f7ecf02e19ff0eb1945a7b3a6baddad4bc8f93d87a9afcaed15b85ce"></a>kMMDC_ExAccessResponse</em>&nbsp;</td><td class="fielddoc">
<p>config the exclusive access reponse </p>
</td></tr>
</table>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">void MMDC_GetDefaultConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__config__t">mmdc_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">mmdc</td><td>config collection pointer config-&gt;bankInterleave = true; config-&gt;secondDDRClock = true; config-&gt;enableOnlyCS0 = true; config-&gt;devType = kMMDC_DDR3; config-&gt;devSize = 0x40000000U; config-&gt;devBank = kMMDC_Bank8; config-&gt;rowWidth = kMMDC_Row16Bits; config-&gt;colWidth = kMMDC_Col10Bits; config-&gt;burstLen = kMMDC_BurstLen8; config-&gt;ODTConfig = NULL; config-&gt;timing = NULL; config-&gt;zqCalibration = NULL; config-&gt;deviceConfig[0] = NULL; config-&gt;deviceConfig[1] = NULL; config-&gt;readDQSCalibration[0] = NULL; config-&gt;readDQSCalibration[1] = NULL; config-&gt;wLevelingCalibration[0] = NULL; config-&gt;wLevelingCalibration[1] = NULL; config-&gt;readCalibration[0] = NULL; config-&gt;readCalibration[1] = NULL; config-&gt;writeCalibration[0] = NULL; config-&gt;writeCalibration[1] = NULL; config-&gt;tuning = NULL; config-&gt;autoRefresh = NULL; config-&gt;powerConfig = NULL; </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_Init </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__config__t">mmdc_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">mmdc</td><td>config collection pointer </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Initialization succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorDGCalibration</td><td>Error happened during hardware DQS gate calibration </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorReadCalibration</td><td>Error happened during hardware read calibration </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorWriteCalibration</td><td>Error happened during hardware write calibration </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorWriteLevelingCalibration</td><td>Error happened during hardware write leveling calibration </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_Deinit </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_HandleCommand </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__cmd__config__t">mmdc_cmd_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">cmd</td><td>configuration collection </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_GetReadData </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t *&#160;</td>
          <td class="paramname"><em>data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">the</td><td>pointer which used to store read data </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_WaitFlagTimeout</td><td>Read data flag wait timeout </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_EnhancePerformance </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__mmdc.html#structmmdc__performance__config__t">mmdc_performance_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">performance</td><td>configuration collection </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_EnableAutoRefresh </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">mmdc</td><td>auto refresh configuration collection </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void MMDC_DisableAutoRefresh </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_EnablePowerSaving </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__power__config__t">mmdc_power_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">mmdc</td><td>device configuration collection, pointer for the configuration. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void MMDC_DisablePowerSaving </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
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</div><div class="memdoc">
<p>MMDC disable automatic power saving. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_Profiling </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__profiling__config__t">mmdc_profiling_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">mmdc</td><td>profiling status and control </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_LPDDR2UpdateDerate </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__auto__refresh__t">mmdc_auto_refresh_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>type</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">auto</td><td>refresh configuration collection,can set to NULL,when do not change refresh rate </td></tr>
    <tr><td class="paramname">derating</td><td>type </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_WaitFlagTimeout</td><td>LPDDR2 AC timing/refresh derate wait flag timeout </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_MonitorLPDDR2OperationTemp </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t *&#160;</td>
          <td class="paramname"><em>mr4</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">MR4</td><td>pointer,use to store the mode register4 value </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_WaitFlagTimeout</td><td>Get MR4 data flag timeout </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_ReadDQSGatingCalibration </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__readDQS__calibration__config__t">mmdc_readDQS_calibration_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">config</td><td>calibration configuration collection </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorDGCalibration</td><td>Read DQS data gate hardware calibration error </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_WriteLevelingCalibration </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__writeLeveling__calibration__config__t">mmdc_writeLeveling_calibration_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">config</td><td>calibration configuration collection </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorWriteLevelingCalibration</td><td>write leveling hardware calibration error </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_WriteCalibration </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">mmdc_write_calibration_config_t *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">config</td><td>calibration configuration collection </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorWriteCalibration</td><td>write hardware calibration error </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_ReadCalibration </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__read__calibration__config__t">mmdc_read_calibration_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">config</td><td>calibration configuration collection </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_ErrorReadCalibration</td><td>read hardware calibration error </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_DoFineTuning </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a>&#160;</td>
          <td class="paramname"><em>devType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__fine__tuning__config__t">mmdc_fine_tuning_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">devType</td><td>MMDC device type </td></tr>
    <tr><td class="paramname">config</td><td>fine tuning configuration collection </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_SetTiming </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a>&#160;</td>
          <td class="paramname"><em>devType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__device__timing__t">mmdc_device_timing_t</a> *&#160;</td>
          <td class="paramname"><em>timing</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">MMDC</td><td>peripheral base address </td></tr>
    <tr><td class="paramname">timing</td><td>pointer to timing structure </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_DeviceInit </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a>&#160;</td>
          <td class="paramname"><em>devType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>targetCS</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__device__config__t">mmdc_device_config_t</a> *&#160;</td>
          <td class="paramname"><em>devConfig</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">MMDC</td><td>base address </td></tr>
    <tr><td class="paramname">device</td><td>basic config info pointer </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_EnterConfigurationMode </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">enable</td><td>enter/exit flag </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_WaitFlagTimeout</td><td>Enter configuration mode time out </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_DoZQCalibration </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#gab210b492af2dae23c0dc82f9b7ad3339">mmdc_device_type_t</a>&#160;</td>
          <td class="paramname"><em>devType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__zq__config__t">mmdc_zq_config_t</a> *&#160;</td>
          <td class="paramname"><em>zqCal</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">devType</td><td>device type </td></tr>
    <tr><td class="paramname">zqCal</td><td>info pointer </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_EnableLowPowerMode </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_WaitFlagTimeout</td><td>Enter low power mode timeout </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">status_t MMDC_EnableDVFSMode </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">kStatus_Success</td><td>Read data succeed </td></tr>
    <tr><td class="paramname">kStatus_MMDC_WaitFlagTimeout</td><td>Enter DVFS mode timeout </td></tr>
  </table>
  </dd>
</dl>

</div>
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          <td class="memname">void MMDC_Reset </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
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      <table class="memname">
        <tr>
          <td class="memname">static void MMDC_SwitchDeviceFrequency </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>ccm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>iomux</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>param</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>codeAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">MMDC</td><td>base address </td></tr>
    <tr><td class="paramname">CCM</td><td>base address </td></tr>
    <tr><td class="paramname">iomux</td><td>base address </td></tr>
    <tr><td class="paramname">target</td><td>frequency value for LPDDR2 and parameter address for DDR3 </td></tr>
    <tr><td class="paramname">assembly</td><td>switch frequency code address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void MMDC_EnableSBS </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void MMDC_TriggerSBS </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static uint32_t MMDC_GetAXIAddrBySBS </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static uint32_t MMDC_GetAXIAttributeBySBS </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void MMDC_EnableProfiling </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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  </tr>
</table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">enable</td><td>or disable flag </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void MMDC_ResumeProfiling </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a class="anchor" id="gac022fa9ee10973da6d178cf9414f7600"></a>
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          <td class="memname">static void MMDC_ResetProfiling </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
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  </tr>
</table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void MMDC_ExclusiveAccess </td>
          <td>(</td>
          <td class="paramtype">MMDC_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__mmdc.html#structmmdc__exaccess__config__t">mmdc_exaccess_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>type</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>MMDC peripheral base address </td></tr>
    <tr><td class="paramname">exclusive</td><td>access config collection </td></tr>
    <tr><td class="paramname">exclusive</td><td>access config type </td></tr>
  </table>
  </dd>
</dl>

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